[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v18 05/13] target-avr: adding AVR interrupt handling
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v18 05/13] target-avr: adding AVR interrupt handling |
Date: |
Fri, 16 Sep 2016 15:00:34 -0700 |
From: Michael Rolnik <address@hidden>
Signed-off-by: Michael Rolnik <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-avr/helper.c | 55 +++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index c187193..61255fd 100644
--- a/target-avr/helper.c
+++ b/target-avr/helper.c
@@ -32,11 +32,66 @@
bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
bool ret = false;
+ CPUClass *cc = CPU_GET_CLASS(cs);
+ AVRCPU *cpu = AVR_CPU(cs);
+ CPUAVRState *env = &cpu->env;
+
+ if (interrupt_request & CPU_INTERRUPT_RESET) {
+ if (cpu_interrupts_enabled(env)) {
+ cs->exception_index = EXCP_RESET;
+ cc->do_interrupt(cs);
+
+ cs->interrupt_request &= ~CPU_INTERRUPT_RESET;
+
+ ret = true;
+ }
+ }
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ if (cpu_interrupts_enabled(env) && env->intsrc != 0) {
+ int index = ctz32(env->intsrc);
+ cs->exception_index = EXCP_INT(index);
+ cc->do_interrupt(cs);
+
+ env->intsrc &= env->intsrc - 1; /* clear the interrupt */
+ cs->interrupt_request &= ~CPU_INTERRUPT_HARD;
+
+ ret = true;
+ }
+ }
return ret;
}
void avr_cpu_do_interrupt(CPUState *cs)
{
+ AVRCPU *cpu = AVR_CPU(cs);
+ CPUAVRState *env = &cpu->env;
+
+ uint32_t ret = env->pc_w;
+ int vector = 0;
+ int size = avr_feature(env, AVR_FEATURE_JMP_CALL) ? 2 : 1;
+ int base = 0; /* TODO: where to get it */
+
+ if (cs->exception_index == EXCP_RESET) {
+ vector = 0;
+ } else if (env->intsrc != 0) {
+ vector = ctz32(env->intsrc) + 1;
+ }
+
+ if (avr_feature(env, AVR_FEATURE_3_BYTE_PC)) {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+ cpu_stb_data(env, env->sp--, (ret & 0xff0000) >> 16);
+ } else if (avr_feature(env, AVR_FEATURE_2_BYTE_PC)) {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ cpu_stb_data(env, env->sp--, (ret & 0x00ff00) >> 8);
+ } else {
+ cpu_stb_data(env, env->sp--, (ret & 0x0000ff));
+ }
+
+ env->pc_w = base + vector * size;
+ env->sregI = 0; /* clear Global Interrupt Flag */
+
+ cs->exception_index = -1;
}
int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
--
2.7.4
- [Qemu-devel] [PATCH v18 00/13] AVR target, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 03/13] target-avr: adding a sample AVR board, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 02/13] target-avr: adding AVR CPU features/flavors, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 01/13] target-avr: AVR cores support is added., Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 05/13] target-avr: adding AVR interrupt handling,
Richard Henderson <=
- [Qemu-devel] [PATCH v18 04/13] target-avr: adding instructions encodings, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 06/13] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 09/13] target-avr: adding instruction decoder, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 12/13] target-avr: Respect .inc.c convention, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 08/13] target-avr: instruction decoder generator, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 07/13] target-avr: adding instruction translation, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 10/13] target-avr: Put env pointer in DisasContext, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 11/13] target-avr: Put all translation code into one compilation unit, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v18 13/13] target-avr: Merge translate-inst.inc.c into translate.c, Richard Henderson, 2016/09/16
- Re: [Qemu-devel] [PATCH v18 00/13] AVR target, no-reply, 2016/09/16