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[Qemu-devel] [PATCH v4 09/35] cputlb: Move probe_write out of softmmu_te
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 09/35] cputlb: Move probe_write out of softmmu_template.h |
Date: |
Fri, 16 Sep 2016 10:46:31 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
cputlb.c | 21 +++++++++++++++++++++
softmmu_template.h | 23 -----------------------
2 files changed, 21 insertions(+), 23 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 5575b73..0c9b77b 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -527,6 +527,27 @@ static bool victim_tlb_hit(CPUArchState *env, size_t
mmu_idx, size_t index,
victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \
(ADDR) & TARGET_PAGE_MASK)
+/* Probe for whether the specified guest write access is permitted.
+ * If it is not permitted then an exception will be taken in the same
+ * way as if this were a real write access (and we will not return).
+ * Otherwise the function will return, and there will be a valid
+ * entry in the TLB for this access.
+ */
+void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
+ uintptr_t retaddr)
+{
+ int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
+ target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
+
+ if ((addr & TARGET_PAGE_MASK)
+ != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
+ /* TLB entry is for a different page */
+ if (!VICTIM_TLB_HIT(addr_write, addr)) {
+ tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr);
+ }
+ }
+}
+
#define MMUSUFFIX _mmu
#define DATA_SIZE 1
diff --git a/softmmu_template.h b/softmmu_template.h
index f9c51fe..538cff5 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -464,29 +464,6 @@ void helper_be_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
glue(glue(st, SUFFIX), _be_p)((uint8_t *)haddr, val);
}
#endif /* DATA_SIZE > 1 */
-
-#if DATA_SIZE == 1
-/* Probe for whether the specified guest write access is permitted.
- * If it is not permitted then an exception will be taken in the same
- * way as if this were a real write access (and we will not return).
- * Otherwise the function will return, and there will be a valid
- * entry in the TLB for this access.
- */
-void probe_write(CPUArchState *env, target_ulong addr, int mmu_idx,
- uintptr_t retaddr)
-{
- int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
- target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
-
- if ((addr & TARGET_PAGE_MASK)
- != (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
- /* TLB entry is for a different page */
- if (!VICTIM_TLB_HIT(addr_write, addr)) {
- tlb_fill(ENV_GET_CPU(env), addr, MMU_DATA_STORE, mmu_idx, retaddr);
- }
- }
-}
-#endif
#endif /* !defined(SOFTMMU_CODE_ACCESS) */
#undef READ_ACCESS_TYPE
--
2.5.5
- [Qemu-devel] [PATCH v4 00/35] cmpxchg-based emulation of atomics, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 01/35] atomics: add atomic_xor, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 02/35] atomics: add atomic_op_fetch variants, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 04/35] int128: Use __int128 if available, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 03/35] exec: Avoid direct references to Int128 parts, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 05/35] int128: Add int128_make128, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 07/35] HACK: Always enable parallel_cpus, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 08/35] cputlb: Replace SHIFT with DATA_SIZE, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 10/35] cputlb: Remove includes from softmmu_template.h, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 09/35] cputlb: Move probe_write out of softmmu_template.h,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 12/35] cputlb: Tidy some macros, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 16/35] tcg: Emit barriers with parallel_cpus, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 11/35] cputlb: Move most of iotlb code out of line, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 17/35] target-i386: emulate LOCK'ed cmpxchg using cmpxchg helpers, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 19/35] target-i386: emulate LOCK'ed INC using atomic helper, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 15/35] tcg: Add CONFIG_ATOMIC64, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 14/35] tcg: Add atomic128 helpers, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 24/35] target-i386: emulate XCHG using atomic helper, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 23/35] target-i386: emulate LOCK'ed BTX ops using atomic helpers, Richard Henderson, 2016/09/16
- [Qemu-devel] [PATCH v4 25/35] target-i386: remove helper_lock(), Richard Henderson, 2016/09/16