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[Qemu-devel] [PATCH 0/2] target-mips: rework conditional stores for mttc


From: Leon Alrae
Subject: [Qemu-devel] [PATCH 0/2] target-mips: rework conditional stores for mttcg
Date: Thu, 15 Sep 2016 09:44:20 +0100

This small series changes MIPS conditional stores implementation for mttcg.
Specifically we compare virtual address of LL and SC (rather than physical)
which allows us to have just a single inlined implementation for user and
system emulation and to use new atomic helpers.

This is done in 2 steps:
Patch 1: modifies existing SC implementation to use virtual addresses
Patch 2: SC emulation rework and making use of cmpxchg

These patches apply on top of Richard's atomic series. I've done only
partial testing since many of my Linux images hit the abort() due to
EXCP_ATOMIC -- but IIUC this is a missing piece in atomic helpers rather
than a problem in the code gen.

Leon Alrae (2):
  target-mips: compare virtual addresses in LL/SC sequence
  target-mips: reimplement SC instruction and use cmpxchg

 linux-user/main.c       |  58 ---------------------
 target-mips/cpu.h       |   7 +--
 target-mips/helper.c    |   6 +--
 target-mips/helper.h    |   2 -
 target-mips/machine.c   |   7 +--
 target-mips/op_helper.c |  52 ++++++-------------
 target-mips/translate.c | 135 ++++++++++++++++++++++++------------------------
 7 files changed, 91 insertions(+), 176 deletions(-)

-- 
2.7.4




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