Re: [Qemu-devel] [PATCH RFC] docs: add PCIe devices placement guidelines

[Laszlo Ersek]

On 09/07/16 08:21, Gerd Hoffmann wrote:
>   Hi,
> 
>>>> ports, if that's allowed). For example:
>>>>
>>>> -  1-32 ports needed: use root ports only
>>>>
>>>> - 33-64 ports needed: use 31 root ports, and one switch with 2-32
>>>> downstream ports
> 
> I expect you rarely need any switches.  You can go multifunction with
> the pcie root ports.  Which is how physical q35 works too btw, typically
> the root ports are on slot 1c for intel chipsets:
> 
> nilsson root ~# lspci -s1c
> 00:1c.0 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset
> Family PCI Express Root Port 1 (rev c4)
> 00:1c.1 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset
> Family PCI Express Root Port 2 (rev c4)
> 00:1c.2 PCI bridge: Intel Corporation 7 Series/C210 Series Chipset
> Family PCI Express Root Port 3 (rev c4)
> 
> Root bus has 32 slots, a few are taken (host bridge @ 00.0, lpc+sata @
> 1f.*, pci bridge @ 1e.0, maybe vga @ 01.0), leaving 28 free slots.  With
> 8 functions each you can have up to 224 root ports without any switches,
> and you have not many pci bus numbers left until you hit the 256 busses
> limit ...

This is an absolutely great idea. I wonder if it allows us to rip out
all the language about switches, upstream ports and downstream ports. It
would be awesome if we didn't have to mention and draw those things *at
all* (better: if we could summarily discourage their use).

Marcel, what do you think?

Thanks
Laszlo