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[Qemu-devel] [PULL 04/66] target-ppc: Introduce POWER ISA 3.0 flag
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 04/66] target-ppc: Introduce POWER ISA 3.0 flag |
Date: |
Tue, 6 Sep 2016 13:42:14 +1000 |
From: Nikunj A Dadhania <address@hidden>
This flag will be used for POWER9 instructions.
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/cpu.h | 5 ++++-
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 786ab5c..d84ea3c 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -2095,6 +2095,8 @@ enum {
PPC2_TM = 0x0000000000020000ULL,
/* Server PM instructgions (ISA 2.06, Book III) */
PPC2_PM_ISA206 = 0x0000000000040000ULL,
+ /* POWER ISA 3.0 */
+ PPC2_ISA300 = 0x0000000000080000ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
@@ -2102,7 +2104,8 @@ enum {
PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | \
PPC2_ALTIVEC_207 | PPC2_ISA207S | PPC2_DFP | \
- PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206)
+ PPC2_FP_CVT_S64 | PPC2_TM | PPC2_PM_ISA206 | \
+ PPC2_ISA300)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 2d29ad8..6bb4162 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8820,7 +8820,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 |
PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 |
- PPC2_TM | PPC2_PM_ISA206;
+ PPC2_TM | PPC2_PM_ISA206 | PPC2_ISA300;
pcc->msr_mask = (1ull << MSR_SF) |
(1ull << MSR_TM) |
(1ull << MSR_VR) |
--
2.7.4
[Qemu-devel] [PULL 00/66] ppc-for-2.8 queue 20160906, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 01/66] xics_kvm: drop extra checking of kernel_xics_fd, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 04/66] target-ppc: Introduce POWER ISA 3.0 flag,
David Gibson <=
- [Qemu-devel] [PULL 03/66] target-ppc: Introduce Power9 family, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 09/66] target-ppc: add cnttzd[.] instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 23/66] ppc: Make float_invalid_op_excp() pass the return address, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 06/66] target-ppc: add cmprb instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 12/66] target-ppc: add setb instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 02/66] hw/ppc: include fdt helper routine in a common file, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 14/66] target-ppc: add maddhd and maddhdu instruction, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 15/66] target-ppc: introduce opc4 for Expanded Opcode, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 08/66] target-ppc: add modulo dword operations, David Gibson, 2016/09/05
- [Qemu-devel] [PULL 05/66] target-ppc: adding addpcis instruction, David Gibson, 2016/09/05