Re: [Qemu-devel] [RFC] target-i386: present virtual L3 cache info for vcpus

[Eduardo Habkost]

On Wed, Aug 31, 2016 at 08:59:41AM +0800, Longpeng (Mike) wrote:
[...]
> >> -/* No L3 cache: */
> >> -#define L3_SIZE_KB             0 /* disabled */
> >> -#define L3_ASSOCIATIVITY       0 /* disabled */
> >> -#define L3_LINES_PER_TAG       0 /* disabled */
> >> -#define L3_LINE_SIZE           0 /* disabled */
> >> +/* Level 3 unified cache: */
> >> +#define L3_LINE_SIZE          64
> >> +#define L3_ASSOCIATIVITY      24
> >> +#define L3_SETS             8192
> >> +#define L3_PARTITIONS          1
> >> +#define L3_DESCRIPTOR CPUID_2_L3_12MB_24WAY_64B
> >> +/*FIXME: CPUID leaf 0x80000006 is inconsistent with leaves 2 & 4 */
> > 
> > Why are you intentionally introducing a bug?
> 
> Please forgive my foolish, I will fix it.
> 
> By the way, There are the same legacy bugs in L1/L2 codes, is there need to 
> fix
> them ?

We want to fix them, but fixing them also requires a mechanism to
configure cache sizes (so we keep compatibility on old
machine-types).

-- 
Eduardo