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Re: [Qemu-devel] [PATCH 0/6] POWER9 TCG enablements - part4
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH 0/6] POWER9 TCG enablements - part4 |
Date: |
Tue, 9 Aug 2016 13:30:17 +1000 |
User-agent: |
Mutt/1.6.2 (2016-07-01) |
On Sun, Aug 07, 2016 at 11:06:49PM +0530, Nikunj A Dadhania wrote:
> This series contains 10 new instructions for POWER9 ISA3.0.
>
> Patches:
> 01: xxspltib: VSX Vector Splat Immediate Byte
> 02: darn: Deliver A Random Number
> 03: lxsibzx - Load VSX Scalar as Integer Byte & Zero Indexed
> lxsihzx - Load VSX Scalar as Integer Halfword & Zero Indexed
> 04: stxsibx - Store VSX Scalar as Integer Byte Indexed
> stxsihx - Store VSX Scalar as Integer Halfword Indexed
> 05: lxvb16x: Load VSX Vector Byte*16
> lxvh8x: Load VSX Vector Halfword*8
> 06: stxvb16x: Store VSX Vector Byte*16
> stxvh8x: Store VSX Vector Halfword*8
>
> Nikunj A Dadhania (5):
> target-ppc: add xxspltib instruction
> target-ppc: add lxsi[bw]zx instruction
> target-ppc: add stxsi[bh]x instruction
> target-ppc: add lxvb16x and lxvh8x
> target-ppc: add stxvb16x and stxvh8x
>
> Ravi Bangoria (1):
> target-ppc: Implement darn instruction
>
> target-ppc/helper.h | 5 +++
> target-ppc/int_helper.c | 14 ++++++++
> target-ppc/mem_helper.c | 65
> +++++++++++++++++++++++++++++++++++++
> target-ppc/translate.c | 61 ++++++++++++++++++++++------------
> target-ppc/translate/vsx-impl.inc.c | 64 ++++++++++++++++++++++++++++++++++++
> target-ppc/translate/vsx-ops.inc.c | 13 ++++++++
> 6 files changed, 202 insertions(+), 20 deletions(-)
>
As with part3, I'll wait for a respin with comments addressed.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-devel] [PATCH 3/6] target-ppc: add lxsi[bw]zx instruction, (continued)