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Re: [Qemu-devel] [PATCH RFC v0 6/6] target-ppc: add extswsli[.] instruct
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH RFC v0 6/6] target-ppc: add extswsli[.] instruction |
Date: |
Wed, 27 Jul 2016 16:07:30 +1000 |
User-agent: |
Mutt/1.6.2 (2016-07-01) |
On Wed, Jul 27, 2016 at 12:56:58AM +0530, Nikunj A Dadhania wrote:
> extswsli : Extend Sign Word & Shift Left Immediate
>
> Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: David Gibson <address@hidden>
> ---
> target-ppc/translate.c | 30 ++++++++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index 3382cd0..0a1b750 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -2322,6 +2322,32 @@ static void gen_sradi1(DisasContext *ctx)
> gen_sradi(ctx, 1);
> }
>
> +/* extswsli & extswsli. */
> +static inline void gen_extswsli(DisasContext *ctx, int n)
> +{
> + int sh = SH(ctx->opcode) + (n << 5);
> + TCGv dst = cpu_gpr[rA(ctx->opcode)];
> + TCGv src = cpu_gpr[rS(ctx->opcode)];
> +
> + tcg_gen_ext32s_tl(dst, src);
> + if (sh != 0) {
> + tcg_gen_shli_tl(dst, dst, sh);
> + }
> + if (unlikely(Rc(ctx->opcode) != 0)) {
> + gen_set_Rc0(ctx, dst);
> + }
> +}
> +
> +static void gen_extswsli0(DisasContext *ctx)
> +{
> + gen_extswsli(ctx, 0);
> +}
> +
> +static void gen_extswsli1(DisasContext *ctx)
> +{
> + gen_extswsli(ctx, 1);
> +}
> +
> /* srd & srd. */
> static void gen_srd(DisasContext *ctx)
> {
> @@ -10231,6 +10257,10 @@ GEN_HANDLER(srad, 0x1F, 0x1A, 0x18, 0x00000000,
> PPC_64B),
> GEN_HANDLER2(sradi0, "sradi", 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B),
> GEN_HANDLER2(sradi1, "sradi", 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B),
> GEN_HANDLER(srd, 0x1F, 0x1B, 0x10, 0x00000000, PPC_64B),
> +GEN_HANDLER2_E(extswsli0, "extswsli", 0x1F, 0x1A, 0x1B, 0x00000000,
> + PPC_NONE, PPC2_ISA300),
> +GEN_HANDLER2_E(extswsli1, "extswsli", 0x1F, 0x1B, 0x1B, 0x00000000,
> + PPC_NONE, PPC2_ISA300),
> #endif
> GEN_HANDLER(frsqrtes, 0x3B, 0x1A, 0xFF, 0x001F07C0, PPC_FLOAT_FRSQRTES),
> GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-devel] [PATCH RFC v0 3/6] target-ppc: add vcmpnez[b, h, w][.] instructions, (continued)
[Qemu-devel] [PATCH RFC v0 6/6] target-ppc: add extswsli[.] instruction, Nikunj A Dadhania, 2016/07/26
- Re: [Qemu-devel] [PATCH RFC v0 6/6] target-ppc: add extswsli[.] instruction,
David Gibson <=
Re: [Qemu-devel] [PATCH RFC v0 0/6] POWER9 TCG enablements - part2, David Gibson, 2016/07/28