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[Qemu-devel] [PULL v4 14/57] intel_iommu: allow queued invalidation for
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v4 14/57] intel_iommu: allow queued invalidation for IR |
Date: |
Thu, 21 Jul 2016 19:27:11 +0300 |
From: Peter Xu <address@hidden>
Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.
Signed-off-by: Peter Xu <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/intel_iommu_internal.h | 2 ++
hw/i386/intel_iommu.c | 9 +++++++++
2 files changed, 11 insertions(+)
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
index e5f514c..b648e69 100644
--- a/hw/i386/intel_iommu_internal.h
+++ b/hw/i386/intel_iommu_internal.h
@@ -286,6 +286,8 @@ typedef struct VTDInvDesc VTDInvDesc;
#define VTD_INV_DESC_TYPE 0xf
#define VTD_INV_DESC_CC 0x1 /* Context-cache Invalidate Desc */
#define VTD_INV_DESC_IOTLB 0x2
+#define VTD_INV_DESC_IEC 0x4 /* Interrupt Entry Cache
+ Invalidate Descriptor */
#define VTD_INV_DESC_WAIT 0x5 /* Invalidation Wait Descriptor */
#define VTD_INV_DESC_NONE 0 /* Not an Invalidate Descriptor */
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 3ee5782..26e322a 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -1404,6 +1404,15 @@ static bool vtd_process_inv_desc(IntelIOMMUState *s)
}
break;
+ case VTD_INV_DESC_IEC:
+ VTD_DPRINTF(INV, "Interrupt Entry Cache Invalidation "
+ "not implemented yet");
+ /*
+ * Since currently we do not cache interrupt entries, we can
+ * just mark this descriptor as "good" and move on.
+ */
+ break;
+
default:
VTD_DPRINTF(GENERAL, "error: unkonw Invalidation Descriptor type "
"hi 0x%"PRIx64 " lo 0x%"PRIx64 " type %"PRIu8,
--
MST
- [Qemu-devel] [PULL v4 04/57] hw/mips: fix PCI bus initialization, (continued)
- [Qemu-devel] [PULL v4 04/57] hw/mips: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 05/57] hw/apb: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 06/57] hw/grackle: fix PCI bus initialization, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 07/57] hw/prep: realize the PCI root bus as part of the prep init, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 08/57] hw/versatile: realize the PCI root bus as part of the versatile init, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 09/57] x86-iommu: introduce parent class, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 10/57] intel_iommu: rename VTD_PCI_DEVFN_MAX to x86-iommu, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 11/57] x86-iommu: provide x86_iommu_get_default, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 12/57] x86-iommu: introduce "intremap" property, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 13/57] acpi: enable INTR for DMAR report structure, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 14/57] intel_iommu: allow queued invalidation for IR,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v4 15/57] intel_iommu: set IR bit for ECAP register, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 16/57] acpi: add DMAR scope definition for root IOAPIC, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 17/57] intel_iommu: define interrupt remap table addr register, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 18/57] intel_iommu: handle interrupt remap enable, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 19/57] intel_iommu: define several structs for IOMMU IR, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 20/57] intel_iommu: add IR translation faults defines, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 21/57] intel_iommu: Add support for PCI MSI remap, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 22/57] q35: ioapic: add support for emulated IOAPIC IR, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 23/57] ioapic: introduce ioapic_entry_parse() helper, Michael S. Tsirkin, 2016/07/21
- [Qemu-devel] [PULL v4 24/57] intel_iommu: add support for split irqchip, Michael S. Tsirkin, 2016/07/21