[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations |
Date: |
Tue, 12 Jul 2016 10:57:17 +1000 |
User-agent: |
Mutt/1.6.1 (2016-04-27) |
On Mon, Jul 11, 2016 at 07:30:08PM +0100, Mark Cave-Ayland wrote:
1;4402;0c> On 11/07/16 02:55, David Gibson wrote:
>
> > On Sat, Jul 09, 2016 at 01:41:31PM +1000, Benjamin Herrenschmidt wrote:
> >> MacOS uses an architecturally illegal MSR combination that
> >> seems nonetheless supported by 32-bit processors, which is
> >> to have MSR[PR]=1 and one or more of MSR[DR/IR/EE]=0.
> >>
> >> This adds support for it. To work properly we need to also
> >> properly include support for PR=1,{I,D}R=0 to the MMU index
> >> used by the qemu TLB.
> >>
> >> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> >
> > Applied to ppc-for-2.7, thanks.
>
> Hi David,
>
> I can't see this in the ppc-for-2.7 branch on github - does it need
> a push?
Yes it did. Done now.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, (continued)
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/08
- [Qemu-devel] [PATCH] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-devel] [PATCH] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, Benjamin Herrenschmidt, 2016/07/08
- Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, Mark Cave-Ayland, 2016/07/09
- Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, David Gibson, 2016/07/10
- Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations, Mark Cave-Ayland, 2016/07/11
- Re: [Qemu-devel] [PATCH v2] ppc: Fix support for odd MSR combinations,
David Gibson <=
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Mark Cave-Ayland, 2016/07/09
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Cédric Le Goater, 2016/07/09
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Benjamin Herrenschmidt, 2016/07/09
- Re: [Qemu-devel] [Qemu-ppc] [PULL 05/23] ppc: Enforce setting MSR:EE, IR and DR when MSR:PR is set, Cédric Le Goater, 2016/07/09
[Qemu-devel] [PULL 18/23] target-ppc: gen_pause for instructions: yield, mdoio, mdoom, miso, David Gibson, 2016/07/01
[Qemu-devel] [PULL 07/23] ppc: LPCR is a HV resource, David Gibson, 2016/07/01
[Qemu-devel] [PULL 09/23] hw/ppc/spapr: Add some missing hcall function set strings, David Gibson, 2016/07/01
[Qemu-devel] [PULL 22/23] spapr: drop duplicate variable in spapr_core_release(), David Gibson, 2016/07/01
[Qemu-devel] [PULL 11/23] spapr: Restore support for older PowerPC CPU cores, David Gibson, 2016/07/01
[Qemu-devel] [PULL 13/23] ppc: Fix 64K pages support in full emulation, David Gibson, 2016/07/01