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Re: [Qemu-devel] [PATCH v4 5/5] x86: Set physical address bits based on
From: |
Dr. David Alan Gilbert |
Subject: |
Re: [Qemu-devel] [PATCH v4 5/5] x86: Set physical address bits based on host |
Date: |
Mon, 11 Jul 2016 16:39:22 +0100 |
User-agent: |
Mutt/1.6.1 (2016-04-27) |
* Eduardo Habkost (address@hidden) wrote:
> On Fri, Jul 08, 2016 at 04:01:39PM +0100, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert" <address@hidden>
> >
> > Add the host-phys-bits boolean property, if true, take phys-bits
> > from the hosts physical bits value, overriding either the default
> > or the user specified value.
> >
> > We can also use the value we read from the host to check the users
> > explicitly set value and warn them if it doesn't match.
> >
> > Signed-off-by: Dr. David Alan Gilbert <address@hidden>
> > ---
> [...]
> > @@ -2952,28 +2977,57 @@ static void x86_cpu_realizefn(DeviceState *dev,
> > Error **errp)
> > & CPUID_EXT2_AMD_ALIASES);
> > }
> >
> > + /* For 64bit systems think about the number of physical bits to
> > present.
> > + * ideally this should be the same as the host; anything other than
> > matching
> > + * the host can cause incorrect guest behaviour.
> > + * QEMU used to pick the magic value of 40 bits that corresponds to
> > + * consumer AMD devices but nothing else.
> > + */
> > + if (cpu->host_phys_bits && !kvm_enabled()) {
> > + error_setg(errp, "phys-bits can not be read from the host in"
> > + " TCG mode");
> > + return;
> > + }
> > +
> > if (env->features[FEAT_8000_0001_EDX] & CPUID_EXT2_LM) {
> > - /* 0 is a special meaning 'use the old default', which matches
> > - * the value used by TCG (40).
> > - */
> > - if (cpu->phys_bits == 0) {
> > - cpu->phys_bits = TCG_PHYS_ADDR_BITS;
> > - }
> > if (kvm_enabled()) {
> > - if (cpu->phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
> > - cpu->phys_bits < 32) {
> > + uint32_t host_phys_bits = x86_host_phys_bits();
> > + static bool warned;
> > +
> > + if (cpu->host_phys_bits) {
> > + /* The user asked for us to use the host physical bits */
> > + cpu->phys_bits = host_phys_bits;
> > + }
> > +
> > + /* Print a warning if the user set it to a value that's not the
> > + * host value.
> > + */
> > + if (cpu->phys_bits != host_phys_bits && cpu->phys_bits != 0 &&
> > + !warned) {
> > + error_report("Warning: Host physical bits (%u)"
> > + " does not match phys-bits property (%u)",
> > + host_phys_bits, cpu->phys_bits);
> > + warned = true;
> > + }
> > +
> > + if (cpu->phys_bits &&
> > + (cpu->phys_bits > TARGET_PHYS_ADDR_SPACE_BITS ||
> > + cpu->phys_bits < 32)) {
> > error_setg(errp, "phys-bits should be between 32 and %u "
> > " (but is %u)",
> > TARGET_PHYS_ADDR_SPACE_BITS,
> > cpu->phys_bits);
> > return;
> > }
> > } else {
> > - if (cpu->phys_bits != TCG_PHYS_ADDR_BITS) {
> > + if (cpu->phys_bits && cpu->phys_bits != TCG_PHYS_ADDR_BITS) {
> > error_setg(errp, "TCG only supports phys-bits=%u",
> > TCG_PHYS_ADDR_BITS);
> > return;
> > }
> > }
> > + if (cpu->phys_bits == 0 && !cpu->host_phys_bits) {
>
> Why the !cpu->host_phys_bits check? It seems to be impossible to
> have (cpu->host_phys_bits == true && cpu->phys_bits == 0) here.
>
> > + cpu->phys_bits = TCG_PHYS_ADDR_BITS;
> > + }
> > } else {
> > /* For 32 bit systems don't use the user set value, but keep
> > * phys_bits consistent with what we tell the guest.
>
> Shouldn't we return error if host-phys-bits is set in 32-bit
> mode?
I've just realised there's a reason that erroring in this case is a problem.
Imagine a future (or downstream) machine type that made host-phys-bits the
default;
how would it run with a 32bit CPU?
Dave
> > @@ -3290,6 +3344,7 @@ static Property x86_cpu_properties[] = {
> > DEFINE_PROP_BOOL("enforce", X86CPU, enforce_cpuid, false),
> > DEFINE_PROP_BOOL("kvm", X86CPU, expose_kvm, true),
> > DEFINE_PROP_UINT32("phys-bits", X86CPU, phys_bits, 0),
> > + DEFINE_PROP_BOOL("host-phys-bits", X86CPU, host_phys_bits, false),
> > DEFINE_PROP_BOOL("fill-mtrr-mask", X86CPU, fill_mtrr_mask, true),
> > DEFINE_PROP_UINT32("level", X86CPU, env.cpuid_level, 0),
> > DEFINE_PROP_UINT32("xlevel", X86CPU, env.cpuid_xlevel, 0),
> > diff --git a/target-i386/cpu.h b/target-i386/cpu.h
> > index 9d79146..3c4e64a 100644
> > --- a/target-i386/cpu.h
> > +++ b/target-i386/cpu.h
> > @@ -1184,6 +1184,9 @@ struct X86CPU {
> > /* if true fill the top bits of the MTRR_PHYSMASKn variable range */
> > bool fill_mtrr_mask;
> >
> > + /* if true override the phys_bits value with a value read from the
> > host */
> > + bool host_phys_bits;
> > +
> > /* Number of physical address bits supported */
> > uint32_t phys_bits;
> >
> > --
> > 2.7.4
> >
>
> --
> Eduardo
--
Dr. David Alan Gilbert / address@hidden / Manchester, UK
- Re: [Qemu-devel] [PATCH v4 2/5] x86: Allow physical address bits to be set, (continued)
[Qemu-devel] [PATCH v4 3/5] x86: Mask mtrr mask based on CPU physical address limits, Dr. David Alan Gilbert (git), 2016/07/08
[Qemu-devel] [PATCH v4 4/5] x86: fill high bits of mtrr mask, Dr. David Alan Gilbert (git), 2016/07/08
[Qemu-devel] [PATCH v4 5/5] x86: Set physical address bits based on host, Dr. David Alan Gilbert (git), 2016/07/08
Re: [Qemu-devel] [PATCH v4 0/5] x86: Physical address limit patches, Eduardo Habkost, 2016/07/08