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[Qemu-devel] [PULL 10/10] target-mips: Add FCR31's FS bit definition
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL 10/10] target-mips: Add FCR31's FS bit definition |
Date: |
Sun, 26 Jun 2016 14:38:42 +0100 |
From: Aleksandar Markovic <address@hidden>
Add preprocessor definition of FCR31's FS bit, and update related
code for setting this bit.
Signed-off-by: Aleksandar Markovic <address@hidden>
Reviewed-by: Leon Alrae <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
---
target-mips/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index bc0c905..c2da5ec 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -113,6 +113,7 @@ struct CPUMIPSFPUContext {
/* fcsr */
uint32_t fcr31_rw_bitmask;
uint32_t fcr31;
+#define FCR31_FS 24
#define FCR31_ABS2008 19
#define FCR31_NAN2008 18
#define SET_FP_COND(num,env) do { ((env).fcr31) |= ((num) ? (1 << ((num) +
24)) : (1 << 23)); } while(0)
@@ -850,7 +851,7 @@ static inline void restore_rounding_mode(CPUMIPSState *env)
static inline void restore_flush_mode(CPUMIPSState *env)
{
- set_flush_to_zero((env->active_fpu.fcr31 & (1 << 24)) != 0,
+ set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
&env->active_fpu.fp_status);
}
--
2.7.4
- [Qemu-devel] [PULL 00/10] target-mips queue, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 02/10] softfloat: Clean code format in fpu/softfloat-specialize.h, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 03/10] softfloat: For Mips only, correct default NaN values, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 04/10] softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd(), Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 05/10] linux-user: Update preprocessor constants for Mips-specific e_flags bits, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 06/10] target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 07/10] target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 01/10] softfloat: Implement run-time-configurable meaning of signaling NaN bit, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 08/10] target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 09/10] target-mips: Implement FCR31's R/W bitmask and related functionalities, Leon Alrae, 2016/06/26
- [Qemu-devel] [PULL 10/10] target-mips: Add FCR31's FS bit definition,
Leon Alrae <=
- Re: [Qemu-devel] [PULL 00/10] target-mips queue, Peter Maydell, 2016/06/27