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From: | Cédric Le Goater |
Subject: | Re: [Qemu-devel] [PATCH v2 3/3] palmetto-bmc: Configure the SCU's hardware strapping register |
Date: | Thu, 23 Jun 2016 08:28:05 +0200 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Icedove/45.1.0 |
On 06/23/2016 04:15 AM, Andrew Jeffery wrote: > The magic constant configures the following options: > > * 28:27: Configure DRAM size as 256MB > * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 > * 23: Configure 24/48MHz CLKIN > * 22: Disable GPIOE pass-through mode > * 21: Disable GPIOD pass-through mode > * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses > * 19: Disable ACPI > * 18: Configure 48MHz CLKIN > * 17: Disable BMC 2nd boot watchdog timer > * 16: Decode SuperIO address 0x2E > * 15: VGA Class Code > * 14: Enable LPC dedicated reset pin > * 13:12: Enable SPI Master and SPI Slave to AHB Bridge > * 11:10: Select CPU:AHB ratio = 2:1 > * 9:8: Select 384MHz H-PLL > * 7: Configure MAC#2 for RMII/NCSI > * 6: Configure MAC#1 for RMII/NCSI > * 5: No VGA BIOS ROM > * 4: Boot using 32bit SPI address mode > * 3:2: Select 16MB VGA memory > * 1:0: Boot from SPI flash memory > > Signed-off-by: Andrew Jeffery <address@hidden> > --- Reviewed-by: Cédric Le Goater <address@hidden> Thanks, C.
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