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Re: [Qemu-devel] [PATCH] vfio/pci: Hide SR-IOV capability
From: |
Eric Blake |
Subject: |
Re: [Qemu-devel] [PATCH] vfio/pci: Hide SR-IOV capability |
Date: |
Mon, 20 Jun 2016 16:23:07 -0600 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 |
On 06/20/2016 04:04 PM, Alex Williamson wrote:
> The kernel currently exposes the SR-IOV capability as read-only
> through vfio-pci. This is sufficient to protect the host kernel, but
> has the potential to confuse guests without further virtualization.
> In particular, OVMF tries to size the VF BARs and comes up with absurd
> results, ending with an assert. There's not much point in adding
> virtualization to a read-only capability, so we simply hide it for
> now. If the kernel ever enables SR-IOV virtualization, we should
> easily be able to test it through VF BAR sizing or explicit flags.
>
> Testing whether we should parse extended capabilities is also pulled
> into the function to keep these assumptions in one place.
>
> Signed-off-by: Alex Williamson <address@hidden>
> ---
> + * Extended capabilities are chained with each pointing to the next, so
> we
> + * can drop anything other than the head of the chain simply by modifying
> + * the previous next pointer. For the head of the chain, we can modify
> the
> + * capability ID to something that cannot match a valid capability. ID
> + * 0 is reserved for this since absence of capabilities is indicated by
> + * 0 for the ID, version, AND next pointer. However,
> pcie_add_capability()
> + * uses ID 0 as reserved for list management and will incorrectly match
> and
> + * assert if we attempt to pre-load the head of the chain with with this
> + * ID. Use ID 0xFFFF temporarily since it is also seems to be reserved
> in
> + * part for identifying abscense of capabilities in a root complex
> register
s/abscense/absence/
--
Eric Blake eblake redhat com +1-919-301-3266
Libvirt virtualization library http://libvirt.org
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