[Qemu-devel] [PATCH 0/3] ich9: clean up handling of output interrupt pins

[Paolo Bonzini]

Currently the southbridge in the q35 machine types gets 40 different
qemu_irqs.  The 16 lower GSIs (connected to both 8259 and IOAPIC) and
the 24 input pins of the IOAPIC (the higher 8 of which correspond to the
8 higher GSIs).  However, there's no reason to use the 16 first input
pins of the IOAPIC except through the 16 lower GSIs.

This series cleans this up by passing just the 24 GSIs to lpc_ich9.c.
The first patch is a bug fix.

Paolo

Paolo Bonzini (3):
  ich9: call ich9_lpc_update_pic for disabled pirqs
  ich9: clean up ich9_lpc_update_pic/ich9_lpc_update_apic and callers
  ich9: unify pic and ioapic IRQ vectors

 hw/i386/pc_q35.c       |  3 +--
 hw/isa/lpc_ich9.c      | 44 +++++++++++++++++---------------------------
 include/hw/i386/ich9.h |  3 +--
 3 files changed, 19 insertions(+), 31 deletions(-)

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2.5.5