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[Qemu-devel] [PULL 00/22] target-arm queue
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 00/22] target-arm queue |
Date: |
Fri, 17 Jun 2016 15:25:30 +0100 |
Nothing here except the GICv3 emulation, but I wanted to get it into
master this week, and nothing else has made it into target-arm.next.
thanks
-- PMM
The following changes since commit 98b5b7422fe1813040b499a4be415a9f514f1c10:
Merge remote-tracking branch
'remotes/amit-migration/tags/migration-for-2.7-5' into staging (2016-06-17
14:09:46 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20160617
for you to fetch changes up to f06765a94a31bdd8b65fc83fd91a6c3f8e8a1195:
ACPI: ARM: Present GIC version in MADT table (2016-06-17 15:23:51 +0100)
----------------------------------------------------------------
target-arm queue:
* GICv3 emulation
----------------------------------------------------------------
Andrew Jeffery (1):
hw/timer: Add value matching support to aspeed_timer
Pavel Fedin (3):
target-arm: Add mp-affinity property for ARM CPU class
hw/intc/arm_gicv3: Add state information
hw/intc/arm_gicv3: Add vmstate descriptors
Peter Maydell (14):
migration: Define VMSTATE_UINT64_2DARRAY
bitops.h: Implement half-shuffle and half-unshuffle ops
target-arm: Define new arm_is_el3_or_mon() function
target-arm: Provide hook to tell GICv3 about changes of security state
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
hw/intc/arm_gicv3: Implement functions to identify next pending irq
hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions
hw/intc/arm_gicv3: Implement gicv3_set_irq()
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
target-arm/machine.c: Allow user to request GICv3 emulation
target-arm/monitor.c: Advertise emulated GICv3 in capabilities
Shannon Zhao (1):
ACPI: ARM: Present GIC version in MADT table
Shlomo Pongratz (3):
hw/intc/arm_gicv3: ARM GICv3 device framework
hw/intc/arm_gicv3: Implement GICv3 distributor registers
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
hw/arm/virt-acpi-build.c | 1 +
hw/intc/Makefile.objs | 4 +
hw/intc/arm_gicv3.c | 400 +++++++++++
hw/intc/arm_gicv3_common.c | 225 +++++-
hw/intc/arm_gicv3_cpuif.c | 1346 ++++++++++++++++++++++++++++++++++++
hw/intc/arm_gicv3_dist.c | 879 +++++++++++++++++++++++
hw/intc/arm_gicv3_kvm.c | 8 +
hw/intc/arm_gicv3_redist.c | 562 +++++++++++++++
hw/intc/gicv3_internal.h | 331 +++++++++
hw/timer/aspeed_timer.c | 138 +++-
include/hw/acpi/acpi-defs.h | 4 +-
include/hw/intc/arm_gicv3.h | 32 +
include/hw/intc/arm_gicv3_common.h | 215 +++++-
include/hw/timer/aspeed_timer.h | 5 +-
include/migration/vmstate.h | 6 +
include/qemu/bitops.h | 108 +++
target-arm/cpu.c | 10 +
target-arm/cpu.h | 47 +-
target-arm/helper.c | 2 +
target-arm/internals.h | 8 +
target-arm/machine.c | 3 +-
target-arm/monitor.c | 3 +-
target-arm/op_helper.c | 4 +
tests/test-bitops.c | 72 ++
trace-events | 41 ++
25 files changed, 4394 insertions(+), 60 deletions(-)
create mode 100644 hw/intc/arm_gicv3.c
create mode 100644 hw/intc/arm_gicv3_cpuif.c
create mode 100644 hw/intc/arm_gicv3_dist.c
create mode 100644 hw/intc/arm_gicv3_redist.c
create mode 100644 hw/intc/gicv3_internal.h
create mode 100644 include/hw/intc/arm_gicv3.h
- [Qemu-devel] [PULL 00/22] target-arm queue,
Peter Maydell <=
- [Qemu-devel] [PULL 03/22] target-arm: Define new arm_is_el3_or_mon() function, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 04/22] target-arm: Provide hook to tell GICv3 about changes of security state, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 05/22] target-arm: Add mp-affinity property for ARM CPU class, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 07/22] hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 01/22] migration: Define VMSTATE_UINT64_2DARRAY, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 02/22] bitops.h: Implement half-shuffle and half-unshuffle ops, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 08/22] hw/intc/arm_gicv3: Add vmstate descriptors, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 12/22] hw/intc/arm_gicv3: Implement GICv3 redistributor registers, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 06/22] hw/intc/arm_gicv3: Add state information, Peter Maydell, 2016/06/17
- [Qemu-devel] [PULL 09/22] hw/intc/arm_gicv3: ARM GICv3 device framework, Peter Maydell, 2016/06/17