[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 10/10] pc: acpi: drop intermediate PCMachineState
From: |
Igor Mammedov |
Subject: |
[Qemu-devel] [PATCH v2 10/10] pc: acpi: drop intermediate PCMachineState.node_cpu |
Date: |
Thu, 16 Jun 2016 18:55:43 +0200 |
PCMachineState.node_cpu was used for mapping APIC ID
to numa node id as CPU entries in SRAT used to be
built on sparse APIC ID bitmap (up to apic_id_limit).
However since commit
5803fce pc: acpi: SRAT: create only valid processor lapic entries
CPU entries in SRAT aren't build using apic bitmap
but using 0..maxcpus index instead which is also used
for creating numa_info[x].node_cpu map.
So instead of doing useless intermediate conversion from
1. node by cpu index -> node by apic id
i.e. numa_info[x].node_cpu -> PCMachineState.node_cpu
2. apic id -> srat entry PMX
PCMachineState.node_cpu[apic id] -> PMX value
use numa_info[x].node_cpu map directly like ARM does and do
1. numa_info[x].node_cpu -> PMX value using index
in range 0..maxcpus
and drop not necessary PCMachineState.node_cpu and related
code.
That also removes the last (not counting legacy hotplug)
dependency of ACPI code on apic_id_limit and need to allocate
huge sparse PCMachineState.node_cpu array in case of 32-bit
APIC IDs.
Signed-off-by: Igor Mammedov <address@hidden>
---
hw/i386/acpi-build.c | 11 ++++++++---
hw/i386/pc.c | 16 +---------------
include/hw/i386/pc.h | 1 -
3 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 0642cf8..3f7e9fb 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -44,6 +44,7 @@
#include "hw/acpi/tpm.h"
#include "sysemu/tpm_backend.h"
#include "hw/timer/mc146818rtc_regs.h"
+#include "sysemu/numa.h"
/* Supported chipsets: */
#include "hw/acpi/piix4.h"
@@ -2316,7 +2317,6 @@ build_srat(GArray *table_data, BIOSLinker *linker,
MachineState *machine)
AcpiSratMemoryAffinity *numamem;
int i;
- uint64_t curnode;
int srat_start, numa_start, slots;
uint64_t mem_len, mem_base, next_base;
MachineClass *mc = MACHINE_GET_CLASS(machine);
@@ -2332,14 +2332,19 @@ build_srat(GArray *table_data, BIOSLinker *linker,
MachineState *machine)
srat->reserved1 = cpu_to_le32(1);
for (i = 0; i < apic_ids->len; i++) {
+ int j;
int apic_id = apic_ids->cpus[i].arch_id;
core = acpi_data_push(table_data, sizeof *core);
core->type = ACPI_SRAT_PROCESSOR_APIC;
core->length = sizeof(*core);
core->local_apic_id = apic_id;
- curnode = pcms->node_cpu[apic_id];
- core->proximity_lo = curnode;
+ for (j = 0; j < nb_numa_nodes; j++) {
+ if (test_bit(i, numa_info[j].node_cpu)) {
+ core->proximity_lo = j;
+ break;
+ }
+ }
memset(core->proximity_hi, 0, 3);
core->local_sapic_eid = 0;
core->flags = cpu_to_le32(1);
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index dbfba5c..b8fead3 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1179,7 +1179,7 @@ void pc_machine_done(Notifier *notifier, void *data)
void pc_guest_info_init(PCMachineState *pcms)
{
- int i, j;
+ int i;
pcms->apic_xrupt_override = kvm_allows_irq0_override();
pcms->numa_nodes = nb_numa_nodes;
@@ -1189,20 +1189,6 @@ void pc_guest_info_init(PCMachineState *pcms)
pcms->node_mem[i] = numa_info[i].node_mem;
}
- pcms->node_cpu = g_malloc0(pcms->apic_id_limit *
- sizeof *pcms->node_cpu);
-
- for (i = 0; i < max_cpus; i++) {
- unsigned int apic_id = x86_cpu_apic_id_from_index(i);
- assert(apic_id < pcms->apic_id_limit);
- for (j = 0; j < nb_numa_nodes; j++) {
- if (test_bit(i, numa_info[j].node_cpu)) {
- pcms->node_cpu[apic_id] = j;
- break;
- }
- }
- }
-
pcms->machine_done.notify = pc_machine_done;
qemu_add_machine_init_done_notifier(&pcms->machine_done);
}
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 884224e..948ed0c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -72,7 +72,6 @@ struct PCMachineState {
/* NUMA information: */
uint64_t numa_nodes;
uint64_t *node_mem;
- uint64_t *node_cpu;
};
#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
--
1.8.3.1
- [Qemu-devel] [PATCH v2 06/10] acpi: cpuhp: implement hot-remove parts of CPU hotplug interface, (continued)
- [Qemu-devel] [PATCH v2 06/10] acpi: cpuhp: implement hot-remove parts of CPU hotplug interface, Igor Mammedov, 2016/06/16
- [Qemu-devel] [PATCH v2 07/10] acpi: cpuhp: add cpu._OST handling, Igor Mammedov, 2016/06/16
- [Qemu-devel] [PATCH v2 08/10] pc: use new CPU hotplug interface since 2.7 machine type, Igor Mammedov, 2016/06/16
- [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Igor Mammedov, 2016/06/16
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Marcel Apfelbaum, 2016/06/23
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Igor Mammedov, 2016/06/23
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Michael S. Tsirkin, 2016/06/24
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Igor Mammedov, 2016/06/24
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Michael S. Tsirkin, 2016/06/24
- Re: [Qemu-devel] [PATCH v2 09/10] tests: acpi: add CPU hotplug testcase, Igor Mammedov, 2016/06/27
[Qemu-devel] [PATCH v2 10/10] pc: acpi: drop intermediate PCMachineState.node_cpu,
Igor Mammedov <=
Re: [Qemu-devel] [PATCH v2 00/10] ACPI CPU hotplug refactoring to support unplug and more than 255 CPUs, Igor Mammedov, 2016/06/21
[Qemu-devel] [PATCH v2 11/10] pc: acpi: update expected DSDT blobs with new CPU hotplug AML, Igor Mammedov, 2016/06/24