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[Qemu-devel] [PULL 05/12] ppc: Change 'invalid' bit mask of tlbiel and t
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 05/12] ppc: Change 'invalid' bit mask of tlbiel and tlbie |
Date: |
Tue, 31 May 2016 10:41:10 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
Otherwise it will trip on the forms used in recent architecture.
Ideally, we should have different handlers for different architecture
levels but our current implementation of TLB flushing is dumb enough
that this will do for now.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/translate.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 690ffd2..868ef31 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -9946,8 +9946,10 @@ GEN_HANDLER2(slbmfee, "slbmfee", 0x1F, 0x13, 0x1C,
0x001F0001, PPC_SEGMENT_64B),
GEN_HANDLER2(slbmfev, "slbmfev", 0x1F, 0x13, 0x1A, 0x001F0001,
PPC_SEGMENT_64B),
#endif
GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA),
-GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x03FF0001, PPC_MEM_TLBIE),
-GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE),
+/* XXX Those instructions will need to be handled differently for
+ * different ISA versions */
+GEN_HANDLER(tlbiel, 0x1F, 0x12, 0x08, 0x001F0001, PPC_MEM_TLBIE),
+GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x001F0001, PPC_MEM_TLBIE),
GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC),
#if defined(TARGET_PPC64)
GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI),
--
2.5.5
- [Qemu-devel] [PULL 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions, (continued)
- [Qemu-devel] [PULL 01/12] ppc: Remove MMU_MODEn_SUFFIX definitions, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 08/12] ppc: Add PPC_64H instruction flag to POWER7 and POWER8, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 10/12] exec: Do vmstate unregistration from cpu_exec_exit(), David Gibson, 2016/05/30
- [Qemu-devel] [PULL 06/12] ppc: Fix sign extension issue in mtmsr(d) emulation, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 07/12] ppc: Get out of emulation on SMT "OR" ops, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 03/12] ppc: Do some batching of TCG tlb flushes, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 11/12] cpu: Reclaim vCPU objects, David Gibson, 2016/05/30
- [Qemu-devel] [PULL 09/12] exec: Remove cpu from cpus list during cpu_exec_exit(), David Gibson, 2016/05/30
- [Qemu-devel] [PULL 05/12] ppc: Change 'invalid' bit mask of tlbiel and tlbie,
David Gibson <=