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Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and
From: |
Edgar E. Iglesias |
Subject: |
Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s |
Date: |
Tue, 10 May 2016 12:36:37 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On Tue, May 10, 2016 at 09:09:55AM +0100, Peter Maydell wrote:
> On 10 May 2016 at 01:16, Alistair Francis <address@hidden> wrote:
> > It is actually a u-boot problem. I originally just assumed it was a
> > Linux problem, but it happens before u-boot hands off to Linux.
>
> OK, that makes sense. u-boot tends to be a bit lower level and less
> hardware-agnostic. I just wanted to check it wasn't caused by some
> problem in QEMU's EL3 support we could easily fix.
>
> > It appears that u-boot won't work at all with EL3 enabled but EL2
> > disabled. It always moves to EL2 before moving to EL1 and there is no
> > code prepared to handle going from EL3 directly to EL1.
> >
> > Just for the record, I'm specifically talking about what happens in
> > the do_nonsec_virt_switch() function.
> >
> > It looks like there are three options:
> > 1. Add support to u-boot to drop from EL3 to EL1 (I'm assuming this
> > is possible, as not all implementations have EL2)
> > 2. Just wait until QEMU adds EL2 support
> > 3. Allow a QEMU command line option to start in EL1 instead of EL3
Alistair,
Our usual ZynqMP boot flow is
ATF at EL3
ATF hands over to u-boot at EL2
u-boot hands over to the Linux kernel at EL2
Our ATF has a mode where it can be instructed to start u-boot in
EL1, bypassing EL2. That would avoid this issue. You don't need to
recompile ATF. We can discuss the details off-line.
> I would be OK with any of these three from a QEMU perspective.
> Fixing u-boot is probably conceptually the nicest but I've never
> looked at u-boot internals so it could be simple or painful...
>
> Edgar, do you have the list of what we're still missing before we
> can turn on EL2?
We're missing the Data Abort ISS:s, we're missing modelling of a few registers
(like HSTR_EL2). Some regs are quite incomplete like HCR but I think we can
live with that. GICv2 virtualization is missing. We are also missing a few
AT_ modes. AArch32 support is probably lacking alot of more stuff.
IIRC, last time this came up we talked about enabling EL2 after ISS and
GICv2 virtualization support gets merged + a few odd regs. Enough to allow
Xen and KVM to work under emulation.
Cheers,
Edgar
- [Qemu-devel] [PATCH v1 0/2] target-arm: Add support for HSTR_EL2, Alistair Francis, 2016/05/06
- [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Alistair Francis, 2016/05/06
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Peter Maydell, 2016/05/06
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Edgar E. Iglesias, 2016/05/06
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Alistair Francis, 2016/05/09
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Peter Maydell, 2016/05/09
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Alistair Francis, 2016/05/09
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Peter Maydell, 2016/05/10
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s,
Edgar E. Iglesias <=
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Peter Maydell, 2016/05/10
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Alistair Francis, 2016/05/10
- Re: [Qemu-devel] [PATCH v1 2/2] target-arm: Enable EL2 for the A53s and A57s, Alistair Francis, 2016/05/10
[Qemu-devel] [PATCH v1 1/2] target-arm: Add the HSTR_EL2 register, Alistair Francis, 2016/05/06