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[Qemu-devel] [RFC v8 03/14] softmmu: Simplify helper_*_st_name, wrap MM
From: |
Alvise Rigo |
Subject: |
[Qemu-devel] [RFC v8 03/14] softmmu: Simplify helper_*_st_name, wrap MMIO code |
Date: |
Tue, 19 Apr 2016 15:39:20 +0200 |
Attempting to simplify the helper_*_st_name, wrap the MMIO code into an
inline function. The function covers both BE and LE cases and it is expanded
twice in each helper (TODO: check this last statement).
Suggested-by: Jani Kokkonen <address@hidden>
Suggested-by: Claudio Fontana <address@hidden>
CC: Alex Bennée <address@hidden>
Signed-off-by: Alvise Rigo <address@hidden>
---
softmmu_template.h | 49 +++++++++++++++++++++++++++----------------------
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/softmmu_template.h b/softmmu_template.h
index 3eb54f8..9185486 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -410,6 +410,29 @@ static inline void smmu_helper(do_unl_store)(CPUArchState
*env,
}
}
+static inline void smmu_helper(do_mmio_store)(CPUArchState *env,
+ bool little_endian,
+ DATA_TYPE val,
+ target_ulong addr,
+ TCGMemOpIdx oi, unsigned mmu_idx,
+ int index, uintptr_t retaddr)
+{
+ CPUIOTLBEntry *iotlbentry = &env->iotlb[mmu_idx][index];
+
+ if ((addr & (DATA_SIZE - 1)) != 0) {
+ smmu_helper(do_unl_store)(env, little_endian, val, addr, mmu_idx, oi,
+ retaddr);
+ }
+ /* ??? Note that the io helpers always read data in the target
+ byte ordering. We should push the LE/BE request down into io. */
+ if (little_endian) {
+ val = TGT_LE(val);
+ } else {
+ val = TGT_BE(val);
+ }
+ glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+}
+
void helper_le_st_name(CPUArchState *env, target_ulong addr, DATA_TYPE val,
TCGMemOpIdx oi, uintptr_t retaddr)
{
@@ -437,17 +460,8 @@ void helper_le_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
/* Handle an IO access. */
if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) {
- CPUIOTLBEntry *iotlbentry;
- if ((addr & (DATA_SIZE - 1)) != 0) {
- smmu_helper(do_unl_store)(env, false, val, addr, oi, mmu_idx,
retaddr);
- return;
- }
- iotlbentry = &env->iotlb[mmu_idx][index];
-
- /* ??? Note that the io helpers always read data in the target
- byte ordering. We should push the LE/BE request down into io. */
- val = TGT_LE(val);
- glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+ smmu_helper(do_mmio_store)(env, true, val, addr, oi, mmu_idx, index,
+ retaddr);
return;
}
@@ -502,17 +516,8 @@ void helper_be_st_name(CPUArchState *env, target_ulong
addr, DATA_TYPE val,
/* Handle an IO access. */
if (unlikely(tlb_addr & ~TARGET_PAGE_MASK)) {
- CPUIOTLBEntry *iotlbentry;
- if ((addr & (DATA_SIZE - 1)) != 0) {
- smmu_helper(do_unl_store)(env, true, val, addr, oi, mmu_idx,
retaddr);
- return;
- }
- iotlbentry = &env->iotlb[mmu_idx][index];
-
- /* ??? Note that the io helpers always read data in the target
- byte ordering. We should push the LE/BE request down into io. */
- val = TGT_BE(val);
- glue(io_write, SUFFIX)(env, iotlbentry, val, addr, retaddr);
+ smmu_helper(do_mmio_store)(env, false, val, addr, oi, mmu_idx, index,
+ retaddr);
return;
}
--
2.8.0
- [Qemu-devel] [RFC v8 00/14] Slow-path for atomic instruction translation, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 03/14] softmmu: Simplify helper_*_st_name, wrap MMIO code,
Alvise Rigo <=
- [Qemu-devel] [RFC v8 05/14] softmmu: Add new TLB_EXCL flag, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 04/14] softmmu: Simplify helper_*_st_name, wrap RAM code, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 01/14] exec.c: Add new exclusive bitmap to ram_list, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 06/14] qom: cpu: Add CPUClass hooks for exclusive range, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 09/14] softmmu: Honor the new exclusive bitmap, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 11/14] tcg: Create new runtime helpers for excl accesses, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 10/14] softmmu: Support MMIO exclusive accesses, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 08/14] softmmu: Add history of excl accesses, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 12/14] target-arm: translate: Use ld/st excl for atomic insns, Alvise Rigo, 2016/04/19
- [Qemu-devel] [RFC v8 02/14] softmmu: Simplify helper_*_st_name, wrap unaligned code, Alvise Rigo, 2016/04/19