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Re: [Qemu-devel] [PATCH 04/17] ppc: Add number of threads per core to th


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH 04/17] ppc: Add number of threads per core to the processor definition
Date: Tue, 15 Mar 2016 20:45:45 +1100
User-agent: Mutt/1.5.24 (2015-08-30)

On Mon, Mar 14, 2016 at 05:56:27PM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <address@hidden>
> 
> Also use it to clamp the max SMT mode and ensure that the cpu_dt_id
> are offset by that value in order to preserve consistency with the
> HW implementations.

I think this can change change CPU ids, and therefore break migration
on some existing setups.  So it will need some rework to apply at all,
and will certainly want to wait until after 2.6

> 
> Signed-off-by: Benjamin Herrenschmidt <address@hidden>
> ---
>  target-ppc/cpu-qom.h        |  1 +
>  target-ppc/translate_init.c | 11 ++++++++++-
>  2 files changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
> index 7d5e2b36a997..735981309c5b 100644
> --- a/target-ppc/cpu-qom.h
> +++ b/target-ppc/cpu-qom.h
> @@ -68,6 +68,7 @@ typedef struct PowerPCCPUClass {
>      uint32_t flags;
>      int bfd_mach;
>      uint32_t l1_dcache_size, l1_icache_size;
> +    uint32_t threads_per_core;
>  #if defined(TARGET_PPC64)
>      const struct ppc_segment_page_sizes *sps;
>  #endif
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 43c6e524a6bc..46dabe58783a 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -8231,6 +8231,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data)
>                   POWERPC_FLAG_BUS_CLK;
>      pcc->l1_dcache_size = 0x8000;
>      pcc->l1_icache_size = 0x10000;
> +    pcc->threads_per_core = 2;
>  }
>  
>  static void powerpc_get_compat(Object *obj, Visitor *v, const char *name,
> @@ -8408,6 +8409,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
>      pcc->l1_dcache_size = 0x8000;
>      pcc->l1_icache_size = 0x8000;
>      pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr;
> +    pcc->threads_per_core = 4;
>  }
>  
>  static void init_proc_POWER8(CPUPPCState *env)
> @@ -8492,6 +8494,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
>      pcc->l1_dcache_size = 0x8000;
>      pcc->l1_icache_size = 0x8000;
>      pcc->interrupts_big_endian = ppc_cpu_interrupts_big_endian_lpcr;
> +    pcc->threads_per_core = 8;
>  }
>  #endif /* defined (TARGET_PPC64) */
>  
> @@ -9195,6 +9198,12 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>  #endif
>  
>  #if !defined(CONFIG_USER_ONLY)
> +    if (pcc->threads_per_core == 0) {
> +        pcc->threads_per_core = 1;
> +    }
> +    if (max_smt > pcc->threads_per_core) {
> +        max_smt = pcc->threads_per_core;
> +    }
>      if (smp_threads > max_smt) {
>          error_setg(errp, "Cannot support more than %d threads on PPC with 
> %s",
>                     max_smt, kvm_enabled() ? "KVM" : "TCG");
> @@ -9215,7 +9224,7 @@ static void ppc_cpu_realizefn(DeviceState *dev, Error 
> **errp)
>      }
>  
>  #if !defined(CONFIG_USER_ONLY)
> -    cpu->cpu_dt_id = (cs->cpu_index / smp_threads) * max_smt
> +    cpu->cpu_dt_id = (cs->cpu_index / smp_threads) * pcc->threads_per_core
>          + (cs->cpu_index % smp_threads);
>  #endif
>  

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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