[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v5 3/5] acpi: pc: add fw_cfg device node to ssdt
From: |
Gabriel L. Somlo |
Subject: |
[Qemu-devel] [PATCH v5 3/5] acpi: pc: add fw_cfg device node to ssdt |
Date: |
Fri, 13 Nov 2015 21:57:16 -0500 |
Add a fw_cfg device node to the ACPI SSDT. While the guest-side
firmware can't utilize this information (since it has to access
the hard-coded fw_cfg device to extract ACPI tables to begin with),
having fw_cfg listed in ACPI will help the guest kernel keep a more
accurate inventory of in-use IO port regions.
Signed-off-by: Gabriel Somlo <address@hidden>
Reviewed-by: Laszlo Ersek <address@hidden>
---
hw/i386/acpi-build.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 29e30ce..17eb99e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1071,6 +1071,35 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(scope, aml_name_decl("_S5", pkg));
aml_append(ssdt, scope);
+ /* create fw_cfg node, unconditionally */
+ {
+ /* when using port i/o, the 8-bit data register *always* overlaps
+ * with half of the 16-bit control register. Hence, the total size
+ * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the
+ * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */
+ uint8_t io_size = object_property_get_bool(OBJECT(guest_info->fw_cfg),
+ "dma_enabled", NULL) ?
+ ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) :
+ FW_CFG_CTL_SIZE;
+
+ scope = aml_scope("\\_SB");
+ dev = aml_device("FWCF");
+
+ aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002")));
+
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size)
+ );
+ aml_append(dev, aml_name_decl("_CRS", crs));
+
+ aml_append(scope, dev);
+ aml_append(ssdt, scope);
+ }
+
if (misc->applesmc_io_base) {
scope = aml_scope("\\_SB.PCI0.ISA");
dev = aml_device("SMC");
--
2.4.3
- [Qemu-devel] [PATCH v5 0/5] add ACPI node for fw_cfg on pc and arm, Gabriel L. Somlo, 2015/11/13
- [Qemu-devel] [PATCH v5 1/5] fw_cfg: expose control register size in fw_cfg.h, Gabriel L. Somlo, 2015/11/13
- [Qemu-devel] [PATCH v5 4/5] acpi: arm: add fw_cfg device node to dsdt, Gabriel L. Somlo, 2015/11/13
- [Qemu-devel] [PATCH v5 5/5] fw_cfg: document ACPI device node information, Gabriel L. Somlo, 2015/11/13
- [Qemu-devel] [PATCH v5 2/5] pc: fw_cfg: move ioport base constant to pc.h, Gabriel L. Somlo, 2015/11/13
- [Qemu-devel] [PATCH v5 3/5] acpi: pc: add fw_cfg device node to ssdt,
Gabriel L. Somlo <=
- Re: [Qemu-devel] [PATCH v5 0/5] add ACPI node for fw_cfg on pc and arm, Marc MarĂ, 2015/11/14
- Re: [Qemu-devel] [PATCH v5 0/5] add ACPI node for fw_cfg on pc and arm, Gabriel L. Somlo, 2015/11/23