Re: [Qemu-devel] [PULL 00/13] X86 queue, 2015-10-23

[Peter Maydell]

On 23 October 2015 at 16:32, Eduardo Habkost <address@hidden> wrote:
> Sorry for not submitting this a few days earlier.
>
> The following changes since commit 147482ae35b896808af68c0051ad86d3aae12979:
>
>   Merge remote-tracking branch 'remotes/dgibson/tags/ppc-next-20151023' into 
> staging (2015-10-23 13:09:09 +0100)
>
> are available in the git repository at:
>
>   git://github.com/ehabkost/qemu.git tags/x86-pull-request
>
> for you to fetch changes up to 31bfa2a40004204aee503c6417fbafb5d17e0a51:
>
>   vl: trivial: minor tweaks to a max-cpu error msg (2015-10-23 13:11:52 -0200)
>
> ----------------------------------------------------------------
> X86 queue, 2015-10-23
>
> ----------------------------------------------------------------
>
> Andrew Jones (1):
>   vl: trivial: minor tweaks to a max-cpu error msg
>
> Eduardo Habkost (6):
>   target-i386: Disable cache info passthrough by default
>   target-i386: Ensure bit 10 on DR7 is never cleared
>   target-i386: Handle I/O breakpoints
>   target-i386: Ensure always-1 bits on DR6 can't be cleared
>   target-i386: Add DE to TCG_FEATURES
>   target-i386: Use 1UL for bit shift
>
> Paolo Bonzini (1):
>   target-i386: allow any alignment for SMBASE
>
> Richard Henderson (5):
>   target-i386: Introduce cpu_x86_update_dr7
>   target-i386: Re-introduce optimal breakpoint removal
>   target-i386: Move hw_*breakpoint_* functions
>   target-i386: Optimize setting dr[0-3]
>   target-i386: Check CR4[DE] for processing DR4/DR5

Applied, thanks.

-- PMM