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[Qemu-devel] [PULL 11/26] target-cris: Mirror gen_opc_pc into insn_start
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 11/26] target-cris: Mirror gen_opc_pc into insn_start |
Date: |
Wed, 7 Oct 2015 20:43:36 +1100 |
This perhaps isn't ideal in terms of (ab)using the "pc" field
to encode both pc and ppc + delay branch state, as one has to
be aware of this when examining opcode dumps.
But it preserves existing logic, which will be good for bisection,
and it certainly does save storage space.
Reviewed-by: Aurelien Jarno <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target-cris/translate.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 477bddc..3d55a6a 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3174,7 +3174,8 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
tcg_ctx.gen_opc_instr_start[lj] = 1;
tcg_ctx.gen_opc_icount[lj] = num_insns;
}
- tcg_gen_insn_start(dc->pc);
+ tcg_gen_insn_start(dc->delayed_branch == 1
+ ? dc->ppc | 1 : dc->pc);
num_insns++;
if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
--
2.4.3
- [Qemu-devel] [PULL 16/26] tcg: Merge cpu_gen_code into tb_gen_code, (continued)
- [Qemu-devel] [PULL 16/26] tcg: Merge cpu_gen_code into tb_gen_code, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 10/26] target-sh4: Add flags state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 22/26] tcg: Remove tcg_gen_code_search_pc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 18/26] tcg: Add TCG_MAX_INSNS, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 23/26] tcg: Emit prologue to the beginning of code_gen_buffer, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 17/26] target-*: Drop cpu_gen_code define, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 20/26] tcg: Save insn data and use it in cpu_restore_state_from_tb, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 21/26] tcg: Remove gen_intermediate_code_pc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 24/26] tcg: Allocate a guard page after code_gen_buffer, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 02/26] target-*: Unconditionally emit tcg_gen_insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 11/26] target-cris: Mirror gen_opc_pc into insn_start,
Richard Henderson <=
- [Qemu-devel] [PULL 08/26] target-mips: Add delayed branch state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 07/26] target-i386: Add cc_op state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 14/26] target-sparc: Remove gen_opc_jump_pc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 26/26] tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 09/26] target-s390x: Add cc_op state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 12/26] target-sparc: Tidy gen_branch_a interface, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 01/26] tcg: Rename debug_insn_start to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 15/26] target-sparc: Add npc state to insn_start, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 19/26] tcg: Pass data argument to restore_state_to_opc, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 25/26] tcg: Check for overflow via highwater mark, Richard Henderson, 2015/10/08