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[Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructi
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructions |
Date: |
Wed, 7 Oct 2015 20:33:04 +1100 |
Signed-off-by: Richard Henderson <address@hidden>
---
target-tilegx/translate.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index 3e5a8ea..9f86fd3 100644
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -627,12 +627,27 @@ static TileExcp gen_rr_opcode(DisasContext *dc, unsigned
opext,
break;
case OE_RR_X0(TBLIDXB0):
case OE_RR_Y0(TBLIDXB0):
+ tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tsrca, 2, 8);
+ mnemonic = "tblidxb0";
+ break;
case OE_RR_X0(TBLIDXB1):
case OE_RR_Y0(TBLIDXB1):
+ tcg_gen_shri_tl(tdest, tsrca, 8);
+ tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+ mnemonic = "tblidxb1";
+ break;
case OE_RR_X0(TBLIDXB2):
case OE_RR_Y0(TBLIDXB2):
+ tcg_gen_shri_tl(tdest, tsrca, 16);
+ tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+ mnemonic = "tblidxb2";
+ break;
case OE_RR_X0(TBLIDXB3):
case OE_RR_Y0(TBLIDXB3):
+ tcg_gen_shri_tl(tdest, tsrca, 24);
+ tcg_gen_deposit_tl(tdest, load_gr(dc, dest), tdest, 2, 8);
+ mnemonic = "tblidxb3";
+ break;
default:
return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
}
--
2.4.3
- [Qemu-devel] [PULL 00/19] Collected tilegx patches, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 02/19] target-tilegx: Implement v*shl, v*shru, and v*shrs instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 04/19] target-tilegx: Implement v1multu instruction, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 19/19] target-tilegx: Support iret instruction and related special registers, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 07/19] target-tilegx: Implement complex multiply instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 14/19] target-tilegx: Handle nofault prefetch instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 08/19] target-tilegx: Let x1 pipe process bpt instruction only, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 09/19] linux-user/syscall_defs.h: Sync the latest si_code from Linux kernel, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 12/19] target-tilegx: Use TILEGX_EXCP_SIGNAL instead of TILEGX_EXCP_SEGV, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 01/19] target-tilegx: Tidy simd_helper.c, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 06/19] target-tilegx: Implement table index instructions,
Richard Henderson <=
- [Qemu-devel] [PULL 13/19] target-tilegx: Fix a typo for mnemonic about "ld_add", Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 15/19] target-tilegx: Implement v2sh* instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 16/19] target-tilegx: Implement v?int_* instructions., Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 03/19] target-tilegx: Implement v*add and v*sub instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 05/19] target-tilegx: Implement crc instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 11/19] target-tilegx: Decode ill pseudo-instructions, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 18/19] target-tilegx: Use TILEGX_EXCP_OPCODE_UNKNOWN and TILEGX_EXCP_OPCODE_UNIMPLEMENTED correctly, Richard Henderson, 2015/10/08
- [Qemu-devel] [PULL 17/19] target-tilegx: Implement v2mults instruction, Richard Henderson, 2015/10/08
- Re: [Qemu-devel] [PULL 00/19] Collected tilegx patches, Peter Maydell, 2015/10/08