Re: [Qemu-devel] [PATCH v2] target-tilegx: Implement v1multu instruction

[Chen Gang]

The related code are changed, so this patch has to be reconstructed.

Thanks

On 9/22/15 06:26, address@hidden wrote:
> From: Chen Gang <address@hidden>
>
> Only according to v1shrs implementation.
>
> Signed-off-by: Chen Gang <address@hidden>
> Reviewed-by: Richard Henderson <address@hidden>
> ---
> target-tilegx/helper.h | 2 ++
> target-tilegx/simd_helper.c | 13 +++++++++++++
> target-tilegx/translate.c | 4 ++++
> 3 files changed, 19 insertions(+)
>
> diff --git a/target-tilegx/helper.h b/target-tilegx/helper.h
> index 6d98f3a..90e558d 100644
> --- a/target-tilegx/helper.h
> +++ b/target-tilegx/helper.h
> @@ -16,3 +16,5 @@ DEF_HELPER_FLAGS_2(v1add, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> DEF_HELPER_FLAGS_2(v1sub, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> DEF_HELPER_FLAGS_2(v2add, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> DEF_HELPER_FLAGS_2(v2sub, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> +
> +DEF_HELPER_FLAGS_2(v1multu, TCG_CALL_NO_RWG_SE, i64, i64, i64)
> diff --git a/target-tilegx/simd_helper.c b/target-tilegx/simd_helper.c
> index 00265fe..b98573e 100644
> --- a/target-tilegx/simd_helper.c
> +++ b/target-tilegx/simd_helper.c
> @@ -107,3 +107,16 @@ uint64_t helper_v2shrs(uint64_t a, uint64_t b)
> }
> return r;
> }
> +
> +uint64_t helper_v1multu(uint64_t a, uint64_t b)
> +{
> + uint64_t r = 0;
> + int i;
> +
> + for (i = 0; i < 64; i += 8) {
> + uint64_t ae = (uint8_t)(a>> i);
> + uint64_t be = (uint8_t)(b>> i);
> + r |= ((ae * be) & 0xff) << i;
> + }
> + return r;
> +}
> diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
> index 297de5c..a9fc4ce 100644
> --- a/target-tilegx/translate.c
> +++ b/target-tilegx/translate.c
> @@ -1113,7 +1113,11 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, 
> unsigned opext,
> case OE_RRR(V1MINU, 0, X1):
> case OE_RRR(V1MNZ, 0, X0):
> case OE_RRR(V1MNZ, 0, X1):
> + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
> case OE_RRR(V1MULTU, 0, X0):
> + gen_helper_v1multu(tdest, tsrca, tsrcb);
> + mnemonic = "v1multu";
> + break;
> case OE_RRR(V1MULUS, 0, X0):
> case OE_RRR(V1MULU, 0, X0):
> case OE_RRR(V1MZ, 0, X0):
>

--
Chen Gang (陈刚)

Open, share, and attitude like air, water, and life which God blessed