[Qemu-devel] [PATCH V1] sdhci: Fix hostctl2 write logic.

[Sai Pavan Boddu]

From: Peter Crosthwaite <address@hidden>

This should be a shifted MASKED_WRITE like all other instances of
non-word aligned registers.

Signed-off-by: Peter Crosthwaite <address@hidden>
---
 hw/sd/sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 8fd75f7..fd354e3 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1059,7 +1059,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, 
unsigned size)
             value |= SDHC_CTRL2_SAMPLING_CLKSEL;
         }
         s->acmd12errsts = value;
-        s->hostctl2 = value >> 16;
+        MASKED_WRITE(s->hostctl2, mask >> 16, value >> 16);
         break;
     case SDHC_CLKCON:
         if (!(mask & 0xFF000000)) {
-- 
2.1.1