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[Qemu-devel] [PATCH v2] target-mips: Fix RDHWR on CP0.Count
From: |
Alex Smith |
Subject: |
[Qemu-devel] [PATCH v2] target-mips: Fix RDHWR on CP0.Count |
Date: |
Tue, 8 Sep 2015 11:34:11 +0100 |
For RDHWR on the CP0.Count register, env->CP0_Count was being returned.
This value is a delta against the QEMU_CLOCK_VIRTUAL clock, not the
correct current value of CP0.Count. Use cpu_mips_get_count() instead.
Signed-off-by: Alex Smith <address@hidden>
Cc: Aurelien Jarno <address@hidden>
Cc: Leon Alrae <address@hidden>
---
Changes in v2:
- Fix build breakage for user builds.
- Correct existing code to follow QEMU coding style.
---
target-mips/op_helper.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 809a061e296b..99574322a29c 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -2184,10 +2184,15 @@ target_ulong helper_rdhwr_synci_step(CPUMIPSState *env)
target_ulong helper_rdhwr_cc(CPUMIPSState *env)
{
if ((env->hflags & MIPS_HFLAG_CP0) ||
- (env->CP0_HWREna & (1 << 2)))
+ (env->CP0_HWREna & (1 << 2))) {
+#ifdef CONFIG_USER_ONLY
return env->CP0_Count;
- else
+#else
+ return (int32_t)cpu_mips_get_count(env);
+#endif
+ } else {
helper_raise_exception(env, EXCP_RI);
+ }
return 0;
}
--
2.5.0
- [Qemu-devel] [PATCH v2] target-mips: Fix RDHWR on CP0.Count,
Alex Smith <=