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Re: [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructi
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructions |
Date: |
Sun, 30 Aug 2015 14:38:10 +0100 |
On 24 August 2015 at 17:17, Richard Henderson <address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> target-tilegx/translate.c | 57
> +++++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 55 insertions(+), 2 deletions(-)
>
> diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
> index 6be751b..4e6d577 100644
> --- a/target-tilegx/translate.c
> +++ b/target-tilegx/translate.c
> @@ -474,6 +474,7 @@ static TileExcp gen_rrr_opcode(DisasContext *dc, unsigned
> opext,
> TCGv tdest = dest_gr(dc, dest);
> TCGv tsrca = load_gr(dc, srca);
> TCGv tsrcb = load_gr(dc, srcb);
> + TCGv t0;
Personally I would restrict the scope of this to just the
case block where it's used.
> case OE_RRR(SHRUX, 0, X0):
> case OE_RRR(SHRUX, 0, X1):
> + t0 = tcg_temp_new();
> + tcg_gen_andi_tl(t0, tsrcb, 31);
> + tcg_gen_ext32u_tl(tdest, tsrca);
> + tcg_gen_shl_tl(tdest, tdest, t0);
> + tcg_gen_ext32s_tl(tdest, tdest);
> + tcg_temp_free(t0);
> + mnemonic = "shrux";
> + break;
Using shl for a shift right doesn't look right...
> case OE_SH(SHRUI, X0):
> case OE_SH(SHRUI, X1):
> case OE_SH(SHRUI, Y0):
> case OE_SH(SHRUI, Y1):
> + tcg_gen_shri_tl(tdest, tsrca, imm);
> + mnemonic = "shrui";
> + break;
> case OE_SH(SHRUXI, X0):
> case OE_SH(SHRUXI, X1):
> + if ((imm & 31) == 0) {
> + tcg_gen_ext32s_tl(tdest, tsrca);
> + } else {
> + tcg_gen_ext32u_tl(tdest, tsrca);
> + tcg_gen_shli_tl(tdest, tdest, imm & 31);
Shift left used when shift right intended ?
> + }
> + mnemonic = "shlxi";
> + break;
> case OE_SH(V1SHLI, X0):
> case OE_SH(V1SHLI, X1):
> case OE_SH(V1SHRSI, X0):
> @@ -1096,6 +1148,7 @@ static TileExcp gen_rri_opcode(DisasContext *dc,
> unsigned opext,
> case OE_SH(V2SHRSI, X1):
> case OE_SH(V2SHRUI, X0):
> case OE_SH(V2SHRUI, X1):
> + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED;
Why does this change appear in this patch?
>
> case OE(ADDLI_OPCODE_X0, 0, X0):
> case OE(ADDLI_OPCODE_X1, 0, X1):
> --
> 2.4.3
>
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v14 22/33] target-tilegx: Implement system and memory management instructions, (continued)
- [Qemu-devel] [PATCH v14 20/33] target-tilegx: Handle conditional branch instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 23/33] target-tilegx: Handle bitfield instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 18/33] target-tilegx: Handle post-increment load and store instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 21/33] target-tilegx: Handle comparison instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructions, Richard Henderson, 2015/08/24
- Re: [Qemu-devel] [PATCH v14 24/33] target-tilegx: Handle shift instructions,
Peter Maydell <=
- [Qemu-devel] [PATCH v14 25/33] target-tilegx: Handle conditional move instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 26/33] target-tilegx: Handle scalar multiply instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 27/33] target-tilegx: Handle mask instructions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 28/33] target-tilegx: Handle v1cmpeq, v1cmpne, Richard Henderson, 2015/08/24
- [Qemu-devel] [PATCH v14 29/33] target-tilegx: Handle mtspr, mfspr, Richard Henderson, 2015/08/24