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[Qemu-devel] [PULL 09/18] tcg/optimize: add optimizations for ext_i32_i6
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 09/18] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops |
Date: |
Mon, 24 Aug 2015 12:36:57 -0700 |
From: Aurelien Jarno <address@hidden>
They behave the same as ext32s_i64 and ext32u_i64 from the constant
folding and zero propagation point of view, except that they can't
be replaced by a mov, so we don't compute the affected value.
Signed-off-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/optimize.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index 47f4147..1804605 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -343,9 +343,11 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg
x, TCGArg y)
CASE_OP_32_64(ext16u):
return (uint16_t)x;
+ case INDEX_op_ext_i32_i64:
case INDEX_op_ext32s_i64:
return (int32_t)x;
+ case INDEX_op_extu_i32_i64:
case INDEX_op_ext32u_i64:
return (uint32_t)x;
@@ -837,6 +839,15 @@ void tcg_optimize(TCGContext *s)
mask = temps[args[1]].mask & mask;
break;
+ case INDEX_op_ext_i32_i64:
+ if ((temps[args[1]].mask & 0x80000000) != 0) {
+ break;
+ }
+ case INDEX_op_extu_i32_i64:
+ /* We do not compute affected as it is a size changing op. */
+ mask = (uint32_t)temps[args[1]].mask;
+ break;
+
CASE_OP_32_64(andc):
/* Known-zeros does not imply known-ones. Therefore unless
args[2] is constant, we can't infer anything from it. */
@@ -1015,6 +1026,8 @@ void tcg_optimize(TCGContext *s)
CASE_OP_32_64(ext16u):
case INDEX_op_ext32s_i64:
case INDEX_op_ext32u_i64:
+ case INDEX_op_ext_i32_i64:
+ case INDEX_op_extu_i32_i64:
if (temp_is_const(args[1])) {
tmp = do_constant_folding(opc, temps[args[1]].val, 0);
tcg_opt_gen_movi(s, op, args, args[0], tmp);
--
2.4.3
- [Qemu-devel] [PULL 00/18] Queued TCG patches, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 01/18] tcg/optimize: fix constant signedness, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 02/18] tcg/optimize: optimize temps tracking, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 03/18] tcg/optimize: add temp_is_const and temp_is_copy functions, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 04/18] tcg/optimize: track const/copy status separately, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 07/18] tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 05/18] tcg/optimize: allow constant to have copies, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 06/18] tcg: rename trunc_shr_i32 into trunc_shr_i64_i32, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 09/18] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops,
Richard Henderson <=
- [Qemu-devel] [PULL 08/18] tcg: implement real ext_i32_i64 and extu_i32_i64 ops, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 10/18] tcg: update README about size changing ops, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 11/18] tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 13/18] tcg/i386: use softmmu fast path for unaligned accesses, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 14/18] tcg/ppc: Improve unaligned load/store handling on 64-bit backend, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 15/18] tcg/s390: Use softmmu fast path for unaligned accesses, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 16/18] tcg/aarch64: Use softmmu fast path for unaligned accesses, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 17/18] linux-user: remove --enable-guest-base/--disable-guest-base, Richard Henderson, 2015/08/24
- [Qemu-devel] [PULL 18/18] linux-user: remove useless macros GUEST_BASE and RESERVED_VA, Richard Henderson, 2015/08/24