[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-s
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-system mode |
Date: |
Tue, 11 Aug 2015 19:16:37 +0100 |
On 5 August 2015 at 17:51, Christopher Covington <address@hidden> wrote:
> This is for full-system only; not implemented in user mode
>
> Written by Derek Hower.
> - cpu_memory_rw_debug(cs, env->regs[13]-64+32, (uint8_t *)&size, 4, 0);
> - env->regs[0] = be32_to_cpu(size);
> + if (env->aarch64) {
> + cpu_memory_rw_debug(cs, env->pc-64+32, (uint8_t *)&size, 4, 0);
> + env->xregs[0] = be32_to_cpu(size);
> + } else {
> + cpu_memory_rw_debug(cs, env->regs[13]-64+32, (uint8_t *)&size, 4, 0);
> + env->regs[0] = be32_to_cpu(size);
> + }
> case TARGET_SYS_FLEN:
> GET_ARG(0);
> if (use_gdb_syscalls()) {
> + if (env->aarch64) {
> + gdb_do_syscall(arm_semi_flen_cb, "fstat,%x,%x",
> + arg0, env->pc-64);
> + return env->xregs[0];
> +
> + } else {
> gdb_do_syscall(arm_semi_flen_cb, "fstat,%x,%x",
> arg0, env->regs[13]-64);
> return env->regs[0];
> + }
These two bits are badly buggy if you ever try to use this semihosting
call with gdb syscalls enabled on A64. r13 is SP, not PC, but your
A64 code is telling gdb to write the struct stat buf to guest memory
starting at pc-64, so it will corrupt the code we've just executed...
(I'm working on an inspired-by-this but rewritten patchset for
A64 semihosting, so this is just in case you were using these
patches somewhere in the interim.)
thanks
-- PMM
- [Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 01/14] Make unknown semihosting calls non-fatal, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 03/14] Fix makefile, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 04/14] Modify load exclusive/store exclusive to use physical addresses with the monitor, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-system mode, Christopher Covington, 2015/08/05
- Re: [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-system mode,
Peter Maydell <=
- [Qemu-devel] [RFC 05/14] Fixed TLB invalidate ops., Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 12/14] bbvec: Detect mode changes after uncached_cpsr update, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 10/14] bbvec: Move mode/PID change detection to register writes, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 07/14] Add PMU to ARM virt platform, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 08/14] Add instruction-counting infrastructure to target-arm, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 13/14] Enable negative icount values for QEMU., Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 11/14] Print bbvec stats on 'magic' exceptions, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 09/14] Implement remaining PMU functionality, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 06/14] Added support for block profiling for AArch32 and Aarch64, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 14/14] bbvec: Properly detect conditional thumb2 branching instructions, Christopher Covington, 2015/08/05