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[Qemu-devel] [PATCH for-2.5 06/30] m68k: REG() macro cleanup
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH for-2.5 06/30] m68k: REG() macro cleanup |
Date: |
Sun, 9 Aug 2015 22:13:25 +0200 |
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index eb7f503..f22155d 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -56,9 +56,10 @@ static TCGv cpu_aregs[8];
static TCGv_i64 cpu_fregs[8];
static TCGv_i64 cpu_macc[4];
-#define DREG(insn, pos) cpu_dregs[((insn) >> (pos)) & 7]
-#define AREG(insn, pos) cpu_aregs[((insn) >> (pos)) & 7]
-#define FREG(insn, pos) cpu_fregs[((insn) >> (pos)) & 7]
+#define REG(insn, pos) (((insn) >> (pos)) & 7)
+#define DREG(insn, pos) cpu_dregs[REG(insn, pos)]
+#define AREG(insn, pos) cpu_aregs[REG(insn, pos)]
+#define FREG(insn, pos) cpu_fregs[REG(insn, pos)]
#define MACREG(acc) cpu_macc[acc]
#define QREG_SP cpu_aregs[7]
--
2.4.3
- Re: [Qemu-devel] [PATCH for-2.5 04/30] m68k: set disassembler mode to 680x0 or coldfire, (continued)
- [Qemu-devel] [PATCH for-2.5 03/30] m68k: introduce read_imXX() functions, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 09/30] m68k: add X flag helpers, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 10/30] m68k: tst bugfix, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 11/30] m68k: improve clr/moveq, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 06/30] m68k: REG() macro cleanup,
Laurent Vivier <=
- [Qemu-devel] [PATCH for-2.5 02/30] m68k: manage scaled index, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 05/30] m68k: define operand sizes, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 12/30] m68k: Manage divw overflow, Laurent Vivier, 2015/08/09
- [Qemu-devel] [PATCH for-2.5 14/30] m68k: allow adda/suba to add/sub word, Laurent Vivier, 2015/08/09