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[Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes
From: |
Christopher Covington |
Subject: |
[Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes |
Date: |
Wed, 5 Aug 2015 12:51:09 -0400 |
Hi,
This series is a jumble of changes that I have found useful for
creating samples of long-running applications. I do not expect any of
these patches to be merged upstream as-is but I'm publishing them as a
way to ask for high-level feedback, as there may very well be much
better ways to achieve the same goal. These changes are based on
commit 1fd1a2cc182d4e331acd92c2cdbb52b3e78c040e.
While the patches are in chronological order, their functionality can
roughly be put in the following categories:
A) Functional fixes
B) Guest->emulator/host communication
C) Instrumentation/profiling capabilities
A) Patches 3, 4, 5, and 13 can perhaps be categorized as functional
fixes. They may be fixed on the current tip. As a write this, I'm
thinking this category may be the best one to target for initial
upstreaming.
B) Patches 1, 2, and 11 implement communications mechanisms. We have
used Angel semihosting and "magic exceptions" to perform various kinds
of guest to emulator and guest to host communication. Since these
patches were originally developed, I've been able to reduce or remove
our need for them, but if anyone has suggestions on better ways to not
need to communicate in the first place or use existing mechanisms to
communicate, that'd be appreciated. As an example, we previously used
semihosting open(), read(), and write() calls for host filesystem
access, but have been able to replace those by mounting a VirtIO-MMIO
9P filesystem. Another example is using poweroff, which ends up making
a PSCI call, to end the run, rather than a custom executable that
makes a semihosting exit call.
C) The instrumentation implemented in patches 6, 7, 8, 9, 10, 12, and
14 allow us to measure instruction counts and "block vectors", with
the primary application of running the offline SimPoint algorithm [1]
on the collected block vectors and dumping application level
checkpoints using CRIU [2] in a second pass.
Thanks,
Christopher Covington
1. http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.58.4012
2. http://criu.org/Main_Page
- [Qemu-devel] RFC: ARM Semihosting, PMU, and BBV Changes,
Christopher Covington <=
- [Qemu-devel] [RFC 01/14] Make unknown semihosting calls non-fatal, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 03/14] Fix makefile, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 04/14] Modify load exclusive/store exclusive to use physical addresses with the monitor, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 02/14] Added semihosting support for A64 in full-system mode, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 05/14] Fixed TLB invalidate ops., Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 12/14] bbvec: Detect mode changes after uncached_cpsr update, Christopher Covington, 2015/08/05
- [Qemu-devel] [RFC 10/14] bbvec: Move mode/PID change detection to register writes, Christopher Covington, 2015/08/05