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[Qemu-devel] [PULL 3/4] tcg/s390x: Mask TCGMemOp appropriately for index
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PULL 3/4] tcg/s390x: Mask TCGMemOp appropriately for indexing |
Date: |
Mon, 3 Aug 2015 10:20:18 +0200 |
Commit 2b7ec66f fixed TCGMemOp masking following the MO_AMASK addition,
but two cases were forgotten in the TCG S390 backend.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/s390/tcg-target.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 921991e..aa718ec 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1390,7 +1390,7 @@ static void tcg_out_call(TCGContext *s, tcg_insn_unit
*dest)
static void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
TCGReg base, TCGReg index, int disp)
{
- switch (opc) {
+ switch (opc & (MO_SSIZE | MO_BSWAP)) {
case MO_UB:
tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
break;
@@ -1449,7 +1449,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s,
TCGMemOp opc, TCGReg data,
static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
TCGReg base, TCGReg index, int disp)
{
- switch (opc) {
+ switch (opc & (MO_SIZE | MO_BSWAP)) {
case MO_UB:
if (disp >= 0 && disp < 0x1000) {
tcg_out_insn(s, RX, STC, data, base, index, disp);
--
2.1.4