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Re: [Qemu-devel] [PATCH v2 for-2.5 11/12] tcg/optimize: do not remember
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH v2 for-2.5 11/12] tcg/optimize: do not remember garbage high bits for 32-bit ops |
Date: |
Wed, 29 Jul 2015 18:34:07 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-07-27 12:56, Aurelien Jarno wrote:
> Now that we have real size changing ops, we don't need to mark high
> bits of the destination as garbage. The goal of the optimizer is to
> predict the value of the temps (and not of the registers) and do
> simplifications when possible. The problem there is therefore not the
> fact that those bits are not counted as garbage, but that a size
> changing op is replaced by a move.
>
> This patch is basically a revert of 24666baf, including the changes that
> have been made since then.
>
> Cc: Richard Henderson <address@hidden>
> Signed-off-by: Aurelien Jarno <address@hidden>
> ---
> tcg/optimize.c | 41 +++++++++++------------------------------
> 1 file changed, 11 insertions(+), 30 deletions(-)
>
> diff --git a/tcg/optimize.c b/tcg/optimize.c
> index 8f33755..166074e 100644
> --- a/tcg/optimize.c
> +++ b/tcg/optimize.c
> @@ -937,17 +922,13 @@ void tcg_optimize(TCGContext *s)
> break;
> }
>
> - /* 32-bit ops generate 32-bit results. For the result is zero test
> - below, we can ignore high bits, but for further optimizations we
> - need to record that the high bits contain garbage. */
> - partmask = mask;
> + /* 32-bit ops generate 32-bit results. */
> if (!(def->flags & TCG_OPF_64BIT)) {
> - mask |= ~(tcg_target_ulong)0xffffffffu;
> - partmask &= 0xffffffffu;
> + mask &= 0xffffffffu;
> affected &= 0xffffffffu;
> }
>
> - if (partmask == 0) {
> + if (mask == 0) {
> assert(nb_oargs == 1);
> tcg_opt_gen_movi(s, op, args, args[0], 0);
> continue;
Answering to myself, this actually doesn't work as the current code
wrongly assumes that all ops writing a 64-bit temp will have the
TCG_OPF_64BIT flag set. This is wrong for at least call.
I still haven't decided what is the best way to fix that, either by
special casing these ops, or by actually looking at the temp type. I
guess performances will decide. In early version of this patchset, I
tried to access the temp type at other places, and it has some
performances impact.
Aurelien
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- [Qemu-devel] [PATCH v2 for-2.5 00/12] tcg: improve optimizer, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 08/12] tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 12/12] tcg: update README about size changing ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 10/12] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 03/12] tcg/optimize: optimize temps tracking, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 11/12] tcg/optimize: do not remember garbage high bits for 32-bit ops, Aurelien Jarno, 2015/07/27
- Re: [Qemu-devel] [PATCH v2 for-2.5 11/12] tcg/optimize: do not remember garbage high bits for 32-bit ops,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 for-2.5 07/12] tcg: rename trunc_shr_i32 into trunc_shr_i64_i32, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 09/12] tcg: implement real ext_i32_i64 and extu_i32_i64 ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 04/12] tcg/optimize: add temp_is_const and temp_is_copy functions, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH for-2.4 02/12] tcg: mark temps as mem_coherent = 0 for mov with a constant, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH for-2.4 01/12] tcg: correctly mark dead inputs for mov with a constant, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 06/12] tcg/optimize: allow constant to have copies, Aurelien Jarno, 2015/07/27