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[Qemu-devel] [PATCH v2 for-2.5 12/12] tcg: update README about size chan
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 for-2.5 12/12] tcg: update README about size changing ops |
Date: |
Mon, 27 Jul 2015 12:56:08 +0200 |
Cc: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/README | 18 +++++++++++++++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/tcg/README b/tcg/README
index 61b3899..a22f251 100644
--- a/tcg/README
+++ b/tcg/README
@@ -466,13 +466,25 @@ On a 32 bit target, all 64 bit operations are converted
to 32 bits. A
few specific operations must be implemented to allow it (see add2_i32,
sub2_i32, brcond2_i32).
+On a 64 bit target, the values are transfered between 32 and 64-bit
+registers using the following ops:
+- trunc_shr_i64_i32
+- ext_i32_i64
+- extu_i32_i64
+
+They ensure that the values are correctly truncated or extended when
+moved from a 32-bit to a 64-bit register or vice-versa. Note that the
+trunc_shr_i64_i32 is an optional op. It is not necessary to implement
+it if all the following conditions are met:
+- 64-bit registers can hold 32-bit values
+- 32-bit values in a 64-bit register do not need to stay zero or
+ sign extended
+- all 32-bit TCG ops ignore the high part of 64-bit registers
+
Floating point operations are not supported in this version. A
previous incarnation of the code generator had full support of them,
but it is better to concentrate on integer operations first.
-On a 64 bit target, no assumption is made in TCG about the storage of
-the 32 bit values in 64 bit registers.
-
4.2) Constraints
GCC like constraints are used to define the constraints of every
--
2.1.4
- [Qemu-devel] [PATCH v2 for-2.5 00/12] tcg: improve optimizer, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 08/12] tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 12/12] tcg: update README about size changing ops,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 for-2.5 10/12] tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 03/12] tcg/optimize: optimize temps tracking, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 11/12] tcg/optimize: do not remember garbage high bits for 32-bit ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 07/12] tcg: rename trunc_shr_i32 into trunc_shr_i64_i32, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 09/12] tcg: implement real ext_i32_i64 and extu_i32_i64 ops, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 04/12] tcg/optimize: add temp_is_const and temp_is_copy functions, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH for-2.4 02/12] tcg: mark temps as mem_coherent = 0 for mov with a constant, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH for-2.4 01/12] tcg: correctly mark dead inputs for mov with a constant, Aurelien Jarno, 2015/07/27
- [Qemu-devel] [PATCH v2 for-2.5 06/12] tcg/optimize: allow constant to have copies, Aurelien Jarno, 2015/07/27