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Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions
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From: |
Aurelien Jarno |
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Subject: |
Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions |
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Date: |
Wed, 1 Jul 2015 16:32:28 +0200 |
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User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-06-30 16:33, Yongbok Kim wrote:
> In the Release 6 of the MIPS Architecture, LL, SC, LLD, SCD, PREF
> and CACHE instructions have 9 bits offsets.
>
> Signed-off-by: Yongbok Kim <address@hidden>
> ---
> disas/mips.c | 12 ++++++------
> 1 files changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- Re: [Qemu-devel] [PATCH] disas/mips: fix disassembling R6 instructions,
Aurelien Jarno <=