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Re: [Qemu-devel] [PATCH pic32 2/7] Stop simulation when processor is sus


From: Peter Crosthwaite
Subject: Re: [Qemu-devel] [PATCH pic32 2/7] Stop simulation when processor is suspended forever by WAIT instruction with interrupts disabled.
Date: Tue, 30 Jun 2015 11:08:54 -0700

On Tue, Jun 30, 2015 at 7:10 AM, Leon Alrae <address@hidden> wrote:
> Hi Serge,
>
> On 30/06/2015 06:02, Serge Vakulenko wrote:
>> Signed-off-by: Serge Vakulenko <address@hidden>
>> ---
>>  target-mips/op_helper.c | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
>> index 2a9ddff..1b7caeb 100644
>> --- a/target-mips/op_helper.c
>> +++ b/target-mips/op_helper.c
>> @@ -22,6 +22,7 @@
>>  #include "exec/helper-proto.h"
>>  #include "exec/cpu_ldst.h"
>>  #include "sysemu/kvm.h"
>> +#include "sysemu/sysemu.h"
>>
>>  #ifndef CONFIG_USER_ONLY
>>  static inline void cpu_mips_tlb_flush (CPUMIPSState *env, int flush_global);
>> @@ -2235,6 +2236,12 @@ void helper_wait(CPUMIPSState *env)
>>  {
>>      CPUState *cs = CPU(mips_env_get_cpu(env));
>>
>> +#ifndef CONFIG_USER_ONLY
>> +    if (!(env->CP0_Status & (1 << CP0St_IE))) {
>> +        /* WAIT instruction with interrupts disabled - halt the simulation. 
>> */
>> +        qemu_system_shutdown_request();
>> +    }
>> +#endif
>
> Why do you want to stop the simulation, wouldn't it be beneficial to leave it
> running? For debugging for example, the user would be still able to inspect
> the state, that could help to find a clue why CPU got suspended forever.
>

In theory, there may also be other actors in the system. Even if the
CPU is in a never-going-to-come-back-to-life state, other-things may
still be happening. This would be best as some sort of core feature to
detect total-inaction of the system. That is, there are no delayed
events pending (timed events and AIOs) and the CPUs are halted. Then
this would be a user option to stop the system on reaching the
machine-inactive state and it would be applicable beyond mips.

Regards,
Peter

> Also, if we take into account implementations (currently not supported in
> QEMU) where CPU can be woken up by a disabled interrupt (the Config7.WII bit
> in P5600 for example), then this won't be correct.
>
> Thanks,
> Leon
>
>



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