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Re: [Qemu-devel] [PATCH v2 3/3] m68k: fix usp processing on interrupt en
From: |
Laurent Vivier |
Subject: |
Re: [Qemu-devel] [PATCH v2 3/3] m68k: fix usp processing on interrupt entry and exception exit |
Date: |
Fri, 19 Jun 2015 21:35:21 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 |
Le 19/06/2015 15:43, address@hidden a écrit :
> From: Greg Ungerer <address@hidden>
>
> The action to potentially switch sp register is not occurring at the correct
> point in the interrupt entry or exception exit sequences.
>
> For the interrupt entry case the sp on entry is used to create the stack
> exception frame - but this may well be the user stack pointer, since we
> haven't done the switch yet. Re-order the flow to switch the sp regs then
> use the current sp to create the exception frame.
>
> For the return from exception case the code is unwinding the sp after
> switching sp registers. But it should always unwind the supervisor sp
> first, then carry out any required sp switch.
>
> Note that these problems don't effect operation unless the user sp bit is
> set in the CACR register. Only a single sp is used in the default power up
> state. Previously Linux only used this single sp mode. But modern versions
> of Linux use the user sp mode now, so we need correct behavior for Linux
> to work.
>
> Signed-off-by: Greg Ungerer <address@hidden>
> Reviewed-by: Peter Crosthwaite <address@hidden>
> ---
> target-m68k/op_helper.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
Reviewed-by: Laurent Vivier <address@hidden>