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Re: [Qemu-devel] [PATCH 02/13] target-mips: add microMIPS TLBINV, TLBINV
From: |
Aurelien Jarno |
Subject: |
Re: [Qemu-devel] [PATCH 02/13] target-mips: add microMIPS TLBINV, TLBINVF |
Date: |
Mon, 15 Jun 2015 13:50:33 +0200 |
User-agent: |
Mutt/1.5.23 (2014-03-12) |
On 2015-06-12 15:02, Yongbok Kim wrote:
> add microMIPS TLBINV, TLBINVF
>
> Signed-off-by: Yongbok Kim <address@hidden>
> ---
> target-mips/translate.c | 8 ++++++++
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index d4a530d..b8c7164 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -11991,6 +11991,8 @@ enum {
> TLBR = 0x1,
> TLBWI = 0x2,
> TLBWR = 0x3,
> + TLBINV = 0x4,
> + TLBINVF = 0x5,
> WAIT = 0x9,
> IRET = 0xd,
> DERET = 0xe,
> @@ -12775,6 +12777,12 @@ static void gen_pool32axf (CPUMIPSState *env,
> DisasContext *ctx, int rt, int rs)
> case TLBWR:
> mips32_op = OPC_TLBWR;
> goto do_cp0;
> + case TLBINV:
> + mips32_op = OPC_TLBINV;
> + goto do_cp0;
> + case TLBINVF:
> + mips32_op = OPC_TLBINVF;
> + goto do_cp0;
> case WAIT:
> mips32_op = OPC_WAIT;
> goto do_cp0;
Reviewed-by: Aurelien Jarno <address@hidden>
--
Aurelien Jarno GPG: 4096R/1DDD8C9B
address@hidden http://www.aurel32.net
- [Qemu-devel] [PATCH 08/13] target-mips: microMIPS32 R6 POOL32A{XF} instructions, (continued)
- [Qemu-devel] [PATCH 08/13] target-mips: microMIPS32 R6 POOL32A{XF} instructions, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 04/13] target-mips: rearrange gen_compute_compact_branch, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 03/13] target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 09/13] target-mips: microMIPS32 R6 POOL32F instructions, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 11/13] target-mips: microMIPS32 R6 Major instructions, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 10/13] target-mips: microMIPS32 R6 POOL32{I, C} instructions, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 13/13] target-mips: add mips32r6-generic CPU definition, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 02/13] target-mips: add microMIPS TLBINV, TLBINVF, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 12/13] target-mips: microMIPS32 R6 POOL16{A, C} instructions, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 01/13] target-mips: fix {D, W}RGPR in microMIPS, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 06/13] target-mips: add microMIPS32 R6 opcode enum, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 07/13] target-mips: microMIPS32 R6 branches and jumps, Yongbok Kim, 2015/06/12
- [Qemu-devel] [PATCH 05/13] target-mips: signal RI for removed instructions in microMIPS R6, Yongbok Kim, 2015/06/12