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[Qemu-devel] [PATCH v2 15/16] target-s390x: use softmmu functions for mv
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 15/16] target-s390x: use softmmu functions for mvcp/mvcs |
Date: |
Wed, 3 Jun 2015 23:09:55 +0200 |
mvcp and mvcs helper get access to the physical memory by a call to
mmu_translate for the virtual to real conversion and then using ldb_phys
and stb_phys to physically access the data. In practice this is quite
slow because it bypasses the QEMU softmmu TLB and because stb_phys calls
try to invalidate the corresponding memory for each access.
Instead use cpu_ldb_{primary,secondary} for the loads and
cpu_stb_{primary,secondary} for the stores. Ideally this should be
further optimized by a call to memcpy, but that already improves the
boot time of a guest by a factor 1.8.
Cc: Alexander Graf <address@hidden>
Cc: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-s390x/mem_helper.c | 53 ++++++++++++++++++-----------------------------
1 file changed, 20 insertions(+), 33 deletions(-)
diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
index 30a2a6d..04500ab 100644
--- a/target-s390x/mem_helper.c
+++ b/target-s390x/mem_helper.c
@@ -1015,59 +1015,46 @@ uint32_t HELPER(csp)(CPUS390XState *env, uint32_t r1,
uint64_t r2)
return cc;
}
-static uint32_t mvc_asc(CPUS390XState *env, int64_t l, uint64_t a1,
- uint64_t mode1, uint64_t a2, uint64_t mode2)
+uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2)
{
- CPUState *cs = CPU(s390_env_get_cpu(env));
- target_ulong src, dest;
- int flags, cc = 0, i;
+ int cc = 0, i;
- if (!l) {
- return 0;
- } else if (l > 256) {
+ HELPER_LOG("%s: %16" PRIx64 " %16" PRIx64 " %16" PRIx64 "\n",
+ __func__, l, a1, a2);
+
+ if (l > 256) {
/* max 256 */
l = 256;
cc = 3;
}
- if (mmu_translate(env, a1, 1, mode1, &dest, &flags, true)) {
- cpu_loop_exit(CPU(s390_env_get_cpu(env)));
- }
- dest |= a1 & ~TARGET_PAGE_MASK;
-
- if (mmu_translate(env, a2, 0, mode2, &src, &flags, true)) {
- cpu_loop_exit(CPU(s390_env_get_cpu(env)));
- }
- src |= a2 & ~TARGET_PAGE_MASK;
-
/* XXX replace w/ memcpy */
for (i = 0; i < l; i++) {
- /* XXX be more clever */
- if ((((dest + i) & TARGET_PAGE_MASK) != (dest & TARGET_PAGE_MASK)) ||
- (((src + i) & TARGET_PAGE_MASK) != (src & TARGET_PAGE_MASK))) {
- mvc_asc(env, l - i, a1 + i, mode1, a2 + i, mode2);
- break;
- }
- stb_phys(cs->as, dest + i, ldub_phys(cs->as, src + i));
+ cpu_stb_secondary(env, a1 + i, cpu_ldub_primary(env, a2 + i));
}
return cc;
}
-uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2)
+uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2)
{
+ int cc = 0, i;
+
HELPER_LOG("%s: %16" PRIx64 " %16" PRIx64 " %16" PRIx64 "\n",
__func__, l, a1, a2);
- return mvc_asc(env, l, a1, PSW_ASC_SECONDARY, a2, PSW_ASC_PRIMARY);
-}
+ if (l > 256) {
+ /* max 256 */
+ l = 256;
+ cc = 3;
+ }
-uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2)
-{
- HELPER_LOG("%s: %16" PRIx64 " %16" PRIx64 " %16" PRIx64 "\n",
- __func__, l, a1, a2);
+ /* XXX replace w/ memcpy */
+ for (i = 0; i < l; i++) {
+ cpu_stb_primary(env, a1 + i, cpu_ldub_secondary(env, a2 + i));
+ }
- return mvc_asc(env, l, a1, PSW_ASC_PRIMARY, a2, PSW_ASC_SECONDARY);
+ return cc;
}
/* invalidate pte */
--
2.1.4
- [Qemu-devel] [PATCH v2 05/16] target-s390x: move SET DFP ROUNDING MODE to the correct facility, (continued)
- [Qemu-devel] [PATCH v2 05/16] target-s390x: move SET DFP ROUNDING MODE to the correct facility, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 03/16] target-s390x: change CHRL and CGHRL format to RIL-b, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 02/16] target-s390x: fix CLGIT instruction, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 14/16] target-s390x: support non current ASC in s390_cpu_handle_mmu_fault, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 04/16] target-s390x: move STORE CLOCK FAST to the correct facility, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 13/16] target-s390x: add a cpu_mmu_idx_to_asc function, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 07/16] target-s390x: implement TRANSLATE AND TEST instruction, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 10/16] target-s390x: implement miscellaneous-instruction-extensions facility, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 15/16] target-s390x: use softmmu functions for mvcp/mvcs,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 08/16] target-s390x: implement TRANSLATE EXTENDED instruction, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 16/16] target-s390x: fix MVC instruction when areas overlap, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 06/16] target-s390x: implement LOAD FP INTEGER instructions, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 11/16] target-s390x: implement load-and-trap facility, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 01/16] target-s390x: fix exception for invalid operation code, Aurelien Jarno, 2015/06/03
- [Qemu-devel] [PATCH v2 12/16] target-s390x: implement high-word facility, Aurelien Jarno, 2015/06/03