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Re: [Qemu-devel] [PATCH] target-arm: fix REVIDR reset value


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] target-arm: fix REVIDR reset value
Date: Tue, 2 Jun 2015 14:18:46 +0100

On 2 June 2015 at 13:51, Shannon Zhao <address@hidden> wrote:
> Hi,
>
> On 2015/6/2 20:21, Sergey Fedorov wrote:
>> According to ARM Cortex-A57 TRM, REVIDR reset value should be zero. So
>> let REVIDR reset value be specified by CPU model and fix it for
>> Cortex-A57.
>>
>
> Also need to fix it for Cortex-A53?

Yes, please.

Also you need to update the comment:
            /* v8 MIDR -- the wildcard isn't necessary, and nor is the
             * variable-MIDR TI925 behaviour. Instead we have a single
             * (strictly speaking IMPDEF) alias of the MIDR, REVIDR.
             */

since the REVIDR isn't an alias of the MIDR any more.

NB: a bug that's been on my todo list for ages is that the comment
is incorrect about the wildcard being unnecessary -- this was a
misreading of the ARM ARM by me when I wrote that code. v8 *does*
retain the aliases of the MIDR at any unoccupied opc2 values
in the 0, c0, c0, x space, and we should provide the wildcard
encoding here.

thanks
-- PMM



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