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[Qemu-devel] [PATCH v3 03/15] target-arm: Add MAIR_EL2
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v3 03/15] target-arm: Add MAIR_EL2 |
Date: |
Fri, 29 May 2015 16:43:15 +1000 |
From: "Edgar E. Iglesias" <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/helper.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index a0b414c..427cfab 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2517,6 +2517,13 @@ static const ARMCPRegInfo v8_el3_no_el2_cp_reginfo[] = {
{ .name = "CPTR_EL2", .state = ARM_CP_STATE_BOTH,
.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 2,
.access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
+ { .name = "MAIR_EL2", .state = ARM_CP_STATE_BOTH,
+ .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 0,
+ .access = PL2_RW, .type = ARM_CP_CONST,
+ .resetvalue = 0 },
+ { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,
+ .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 1,
+ .access = PL2_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
REGINFO_SENTINEL
};
@@ -2588,6 +2595,14 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = {
.opc0 = 3, .opc1 = 4, .crn = 1, .crm = 1, .opc2 = 2,
.access = PL2_RW, .accessfn = cptr_access, .resetvalue = 0,
.fieldoffset = offsetof(CPUARMState, cp15.cptr_el[2]) },
+ { .name = "MAIR_EL2", .state = ARM_CP_STATE_BOTH,
+ .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 0,
+ .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.mair_el[2]),
+ .resetvalue = 0 },
+ { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,
+ .opc1 = 4, .crn = 10, .crm = 2, .opc2 = 1,
+ .access = PL2_RW, .type = ARM_CP_ALIAS,
+ .fieldoffset = offsetofhigh32(CPUARMState, cp15.mair_el[2]) },
REGINFO_SENTINEL
};
--
1.9.1
- [Qemu-devel] [PATCH v3 00/15] arm: Steps towards EL2 support round 3, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 01/15] target-arm: Correct check for non-EL3, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 02/15] target-arm: Break down TLB_LOCKDOWN, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 03/15] target-arm: Add MAIR_EL2,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v3 04/15] target-arm: Add TCR_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 05/15] target-arm: Add SCTLR_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 06/15] target-arm: Add TPIDR_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 07/15] target-arm: Add TTBR0_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 08/15] target-arm: Add TLBI_ALLE1{IS}, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 09/15] target-arm: Add TLBI_ALLE2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 10/15] target-arm: Add TLBI_VAE2{IS}, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 11/15] target-arm: Add CNTVOFF_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 12/15] target-arm: Add CNTHCTL_EL2, Edgar E. Iglesias, 2015/05/29
- [Qemu-devel] [PATCH v3 13/15] target-arm: Pass timeridx as argument to various timer functions, Edgar E. Iglesias, 2015/05/29