qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [RESEND PATCH 05/23] hw/acpi/aml-build: Add aml_interru


From: Igor Mammedov
Subject: Re: [Qemu-devel] [RESEND PATCH 05/23] hw/acpi/aml-build: Add aml_interrupt() term
Date: Wed, 20 May 2015 13:05:38 +0200

On Wed, 20 May 2015 12:23:02 +0800
Shannon Zhao <address@hidden> wrote:

> From: Shannon Zhao <address@hidden>
> 
> Add aml_interrupt() for describing device interrupt in resource template.
> These can be used to generating DSDT table for ACPI on ARM.
> 
> Signed-off-by: Shannon Zhao <address@hidden>
> Signed-off-by: Shannon Zhao <address@hidden>
> ---
>  hw/acpi/aml-build.c         | 22 ++++++++++++++++++++++
>  include/hw/acpi/aml-build.h | 42 ++++++++++++++++++++++++++++++++++++++++++
>  2 files changed, 64 insertions(+)
> 
> diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
> index 805a0ad..5f06367 100644
> --- a/hw/acpi/aml-build.c
> +++ b/hw/acpi/aml-build.c
> @@ -531,6 +531,28 @@ Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
>      return var;
>  }
>  
> +/*
> + * ACPI 5.0: 6.4.3.6 Extended Interrupt Descriptor
> + * Type 1, Large Item Name 0x9
> + */
> +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> +                   AmlLevelAndEdge level_and_edge,
> +                   AmlActiveHighAndLow high_and_low, AmlShared shared,
> +                   uint32_t irq)
> +{
> +    Aml *var = aml_alloc();
> +    uint8_t irq_flags = con_and_pro | (level_and_edge << 1)
> +                        | (high_and_low << 2) | (shared << 3);
> +
> +    build_append_byte(var->buf, 0x89); /* Extended irq descriptor */
> +    build_append_byte(var->buf, 6); /* Length, bits[7:0] minimum value = 6 */
> +    build_append_byte(var->buf, 0); /* Length, bits[15:8] minimum value = 0 
> */
> +    build_append_byte(var->buf, irq_flags); /* Interrupt Vector Information. 
> */
> +    build_append_byte(var->buf, 0x01); /* Interrupt table length = 1 */
> +    build_append_4bytes(var->buf, irq); /* Interrupt Number */
Just looking at the patch I have no idea what above line does;

using 4 build_append_byte() is much clearer and matches the spec 1:1
when comparing.


> +    return var;
> +}
> +
>  /* ACPI 1.0b: 6.4.2.5 I/O Port Descriptor */
>  Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
>              uint8_t aln, uint8_t len)
> diff --git a/include/hw/acpi/aml-build.h b/include/hw/acpi/aml-build.h
> index bd0d9e7..df23479 100644
> --- a/include/hw/acpi/aml-build.h
> +++ b/include/hw/acpi/aml-build.h
> @@ -111,6 +111,44 @@ typedef enum {
>      AML_READ_WRITE = 1,
>  } AmlReadAndWrite;
>  
> +/*
> + * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
> + * Interrupt Vector Flags Bits[0] Consumer/Producer
> + */
> +typedef enum {
> +    AML_CONSUMER_PRODUCER = 0,
> +    AML_CONSUMER = 1,
> +} AmlConsumerAndProducer;
> +
> +/*
> + * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
> + * _HE field definition
> + */
> +typedef enum {
> +    AML_LEVEL = 0,
> +    AML_EDGE = 1,
> +} AmlLevelAndEdge;
> +
> +/*
> + * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
> + * _LL field definition
> + */
> +typedef enum {
> +    AML_ACTIVE_HIGH = 0,
> +    AML_ACTIVE_LOW = 1,
> +} AmlActiveHighAndLow;
> +
> +/*
> + * ACPI 5.0: Table 6-187 Extended Interrupt Descriptor Definition
> + * _SHR field definition
> + */
> +typedef enum {
> +    AML_EXCLUSIVE = 0,
> +    AML_SHARED = 1,
> +    AML_EXCLUSIVE_AND_WAKE = 2,
> +    AML_SHARED_AND_WAKE = 3,
> +} AmlShared;
> +
>  typedef
>  struct AcpiBuildTables {
>      GArray *table_data;
> @@ -170,6 +208,10 @@ Aml *aml_call3(const char *method, Aml *arg1, Aml *arg2, 
> Aml *arg3);
>  Aml *aml_call4(const char *method, Aml *arg1, Aml *arg2, Aml *arg3, Aml 
> *arg4);
>  Aml *aml_memory32_fixed(uint32_t addr, uint32_t size,
>                          AmlReadAndWrite read_and_write);
> +Aml *aml_interrupt(AmlConsumerAndProducer con_and_pro,
> +                   AmlLevelAndEdge level_and_edge,
> +                   AmlActiveHighAndLow high_and_low, AmlShared shared,
> +                   uint32_t irq);
>  Aml *aml_io(AmlIODecode dec, uint16_t min_base, uint16_t max_base,
>              uint8_t aln, uint8_t len);
>  Aml *aml_operation_region(const char *name, AmlRegionSpace rs,




reply via email to

[Prev in Thread] Current Thread [Next in Thread]