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Re: [Qemu-devel] [PULL 00/21] target-arm queue
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PULL 00/21] target-arm queue |
Date: |
Tue, 19 May 2015 08:57:42 +0100 |
On 18 May 2015 at 20:15, Peter Maydell <address@hidden> wrote:
> target-arm queue: mostly the new Xilinx board, plus a handful
> of other minor things.
>
> -- PMM
>
>
> The following changes since commit 385057cbec9b4a0eb6150330c572e875ed714965:
>
> Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2015-05-15'
> into staging (2015-05-15 17:51:20 +0100)
>
> are available in the git repository at:
>
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20150518-3
>
> for you to fetch changes up to 18084b2f71b22b3ec3bf4828b8cb83d1d39e8502:
>
> target-arm: Remove unneeded '+' (2015-05-18 20:04:19 +0100)
>
> ----------------------------------------------------------------
> target-arm:
> * New board model: xlnx-ep108
> * Some more preparation for AArch64 EL2/EL3
> * Fix bugs in access checking for generic counter registers
> * Remove a stray '+' sign
>
> ----------------------------------------------------------------
Applied, thanks.
-- PMM
- [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use, (continued)
- [Qemu-devel] [PULL 16/21] target-arm: Add TTBR regime function and use, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 09/21] char: cadence_uart: Clean up variable names, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 13/21] arm: xlnx-ep108: Add external RAM, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 08/21] arm: xlnx-zynqmp: Add GEM support, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 04/21] arm: xlnx-zynqmp: Add GIC, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 01/21] target-arm: cpu64: generalise name of A57 regs, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 05/21] arm: xlnx-zynqmp: Connect CPU Timers to GIC, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 06/21] net: cadence_gem: Clean up variable names, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 03/21] arm: Introduce Xilinx ZynqMP SoC, Peter Maydell, 2015/05/18
- [Qemu-devel] [PULL 07/21] net: cadence_gem: Split state struct and type into header, Peter Maydell, 2015/05/18
- Re: [Qemu-devel] [PULL 00/21] target-arm queue,
Peter Maydell <=