[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v3 05/16] hw/intc/arm_gic: Add ns_access() function
From: |
Greg Bellows |
Subject: |
[Qemu-devel] [PATCH v3 05/16] hw/intc/arm_gic: Add ns_access() function |
Date: |
Wed, 15 Apr 2015 11:02:11 -0500 |
From: Fabian Aggeler <address@hidden>
Security Extensions for GICv1 and GICv2 use register banking
to provide transparent access to seperate Secure and Non-secure
copies of GIC configuration registers. This function will later
be replaced by code determining the security state of a read/write
access to a register.
Signed-off-by: Fabian Aggeler <address@hidden>
Signed-off-by: Greg Bellows <address@hidden>
---
hw/intc/arm_gic.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index cdf7408..e0bce6e 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -45,6 +45,13 @@ static inline int gic_get_current_cpu(GICState *s)
return 0;
}
+/* Security state of a read / write access */
+static inline bool ns_access(void)
+{
+ /* TODO: use actual security state */
+ return true;
+}
+
/* TODO: Many places that call this routine could be optimized. */
/* Update interrupt status after enabled or pending bits have been changed. */
void gic_update(GICState *s)
--
1.8.3.2
- [Qemu-devel] [PATCH v3 03/16] hw/arm/virt.c: Wire FIQ between CPU <> GIC, (continued)
- [Qemu-devel] [PATCH v3 03/16] hw/arm/virt.c: Wire FIQ between CPU <> GIC, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 02/16] hw/arm/vexpress.c: Wire FIQ between CPU <> GIC, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 04/16] hw/intc/arm_gic: Add Security Extensions property, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 06/16] hw/intc/arm_gic: Add Interrupt Group Registers, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 01/16] hw/intc/arm_gic: Request FIQ sources, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 08/16] hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 07/16] hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 11/16] hw/intc/arm_gic: Handle grouping for GICC_HPPIR, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 05/16] hw/intc/arm_gic: Add ns_access() function,
Greg Bellows <=
- [Qemu-devel] [PATCH v3 14/16] hw/intc/arm_gic: Restrict priority view, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() function, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 16/16] hw/intc/arm_gic: add gic_update() for grouping, Greg Bellows, 2015/04/15
- [Qemu-devel] [PATCH v3 12/16] hw/intc/arm_gic: Change behavior of EOIR writes, Greg Bellows, 2015/04/15