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[Qemu-devel] [PATCH v5 12/20] hw/arm/virt-acpi-build: Add PCIe info and
From: |
Shannon Zhao |
Subject: |
[Qemu-devel] [PATCH v5 12/20] hw/arm/virt-acpi-build: Add PCIe info and generate MCFG table |
Date: |
Wed, 15 Apr 2015 21:25:01 +0800 |
From: Shannon Zhao <address@hidden>
Add PCIe info struct, prepare for building PCIe table.
And generate MCFG table.
Signed-off-by: Shannon Zhao <address@hidden>
Signed-off-by: Shannon Zhao <address@hidden>
---
hw/arm/virt-acpi-build.c | 21 +++++++++++++++++++++
include/hw/arm/virt-acpi-build.h | 9 +++++++++
2 files changed, 30 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index aa4acc6..85e8242 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -189,6 +189,24 @@ build_rsdp(GArray *rsdp_table, GArray *linker, unsigned
rsdt)
return rsdp_table;
}
+static void
+build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
+{
+ AcpiTableMcfg *mcfg;
+ AcpiPcieInfo *info = guest_info->pcie_info;
+ int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]);
+
+ mcfg = acpi_data_push(table_data, len);
+ mcfg->allocation[0].address = cpu_to_le64(info->pcie_ecam.addr);
+
+ /* Only a single allocation so no need to play with segments */
+ mcfg->allocation[0].pci_segment = cpu_to_le16(0);
+ mcfg->allocation[0].start_bus_number = 0;
+ mcfg->allocation[0].end_bus_number = info->nr_pcie_buses - 1;
+
+ build_header(linker, table_data, (void *)mcfg, "MCFG", len, 1);
+}
+
/* GTDT */
static void
build_gtdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
@@ -361,6 +379,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info,
AcpiBuildTables *tables)
acpi_add_table(table_offsets, tables_blob);
build_gtdt(tables_blob, tables->linker, guest_info);
+ acpi_add_table(table_offsets, tables_blob);
+ build_mcfg(tables_blob, tables->linker, guest_info);
+
/* RSDT is pointed to by RSDP */
rsdt = tables_blob->len;
build_rsdt(tables_blob, tables->linker, table_offsets);
diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h
index 8f0b4a7..572864a 100644
--- a/include/hw/arm/virt-acpi-build.h
+++ b/include/hw/arm/virt-acpi-build.h
@@ -52,6 +52,14 @@ typedef struct AcpiDsdtInfo {
const MemMap *flash_memmap;
} AcpiDsdtInfo;
+typedef struct AcpiPcieInfo {
+ const int *pcie_irq;
+ MemMap pcie_mmio;
+ MemMap pcie_ioport;
+ MemMap pcie_ecam;
+ int nr_pcie_buses;
+} AcpiPcieInfo;
+
typedef struct VirtGuestInfo {
int smp_cpus;
int max_cpus;
@@ -59,6 +67,7 @@ typedef struct VirtGuestInfo {
AcpiMadtInfo *madt_info;
AcpiDsdtInfo *dsdt_info;
AcpiGtdtInfo *gtdt_info;
+ AcpiPcieInfo *pcie_info;
} VirtGuestInfo;
--
2.0.4
- [Qemu-devel] [PATCH v5 00/20] Generate ACPI v5.1 tables and expose them to guest over fw_cfg on ARM, Shannon Zhao, 2015/04/15
- [Qemu-devel] [PATCH v5 12/20] hw/arm/virt-acpi-build: Add PCIe info and generate MCFG table,
Shannon Zhao <=
- [Qemu-devel] [PATCH v5 10/20] hw/arm/virt-acpi-build: Generate RSDT table, Shannon Zhao, 2015/04/15
- [Qemu-devel] [PATCH v5 16/20] hw/acpi/aml-build: Add aml_else() term, Shannon Zhao, 2015/04/15
- [Qemu-devel] [PATCH v5 09/20] hw/arm/virt-acpi-build: Generate GTDT table, Shannon Zhao, 2015/04/15
- [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Shannon Zhao, 2015/04/15
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Igor Mammedov, 2015/04/28
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Shannon Zhao, 2015/04/28
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Igor Mammedov, 2015/04/28
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Shannon Zhao, 2015/04/28
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Igor Mammedov, 2015/04/28
- Re: [Qemu-devel] [PATCH v5 13/20] hw/acpi/aml-build: Add ToUUID macro, Shannon Zhao, 2015/04/28