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[Qemu-devel] [PULL v3 08/26] pc: acpi: drop manual hole punching for PCI
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL v3 08/26] pc: acpi: drop manual hole punching for PCI hotplug resources |
Date: |
Mon, 2 Mar 2015 11:58:58 +0100 |
From: Igor Mammedov <address@hidden>
Drops manual hole punching in PCI0._CRS for PIIX4 machine type.
Resources will be consumed by Device(PHPR) that cwis attached
to PCI bus. The same way how it currently works for mem hotlpug.
Manual hole in PIIX4 _CRS wasn't correct anyway since it was
legacy size 0xF while current PCIHP MMIO region is of size 0x14.
Signed-off-by: Igor Mammedov <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/i386/acpi-build.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 355f9b7..02e2597 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -885,11 +885,7 @@ build_ssdt(GArray *table_data, GArray *linker,
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
- 0x0000, 0x0D00, 0xADFF, 0x0000, 0xA100));
- aml_append(crs,
- aml_word_io(aml_min_fixed, aml_max_fixed,
- aml_pos_decode, aml_entire_range,
- 0x0000, 0xAE0F, 0xAEFF, 0x0000, 0x00F1));
+ 0x0000, 0x0D00, 0xAEFF, 0x0000, 0xA200));
aml_append(crs,
aml_word_io(aml_min_fixed, aml_max_fixed,
aml_pos_decode, aml_entire_range,
--
MST
- [Qemu-devel] [PULL v3 00/26] pci, pc, virtio fixes and cleanups, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 01/26] balloon: call qdev_alias_all_properties for proxy dev in balloon class init, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 02/26] tpm: Extend sts register to 32 bit, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 04/26] tpm: Support for XFIFO register, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 03/26] tpm: Allow 32 & 16 bit accesses to the registers, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 05/26] tpm: Support for TIS selftest done flag, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 06/26] tpm: Support for capability flags of TIS 1.3, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 09/26] pc: acpi: drop manual hole punching for CPU hotplug resources, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 07/26] pc: acpi-build: create PCI0._CRS dynamically, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 08/26] pc: acpi: drop manual hole punching for PCI hotplug resources,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL v3 10/26] pc: acpi: drop manual hole punching for GPE0 resources, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 12/26] acpi: add acpi_irq_no_flags() term, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 11/26] pc: acpi-build: drop remaining ssdt_misc template, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 13/26] pc: export applesmc IO port/len, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 14/26] pc: acpi-build: drop template patching and create Device(SMC) dynamically, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 15/26] tests: ACPI test blobs update due to PCI0._CRS changes, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 16/26] tests: bios-tables-test: add support for testing bridges, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 17/26] tests: add ACPI blobs for qemu with bridge cases, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 18/26] pc: acpi-build: simplify PCI bus tree generation, Michael S. Tsirkin, 2015/03/02
- [Qemu-devel] [PULL v3 19/26] tests: ACPI: update pc/SSDT.bridge due to new alg of PCI tree creation, Michael S. Tsirkin, 2015/03/02