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[Qemu-devel] [PULL 10/29] s390x/mmu: Fix translation exception code in l
From: |
Christian Borntraeger |
Subject: |
[Qemu-devel] [PULL 10/29] s390x/mmu: Fix translation exception code in lowcore |
Date: |
Wed, 18 Feb 2015 21:22:04 +0100 |
From: Thomas Huth <address@hidden>
The address space bits in the translation exception code were wrong.
In fact, we can simply copy the bits from the PSW, so there's no need
for the trans_bits() function anymore.
Additionally, we now also set the fetch/store bits in the translation
exception code, so a guest can determine whether the exception occured
during a write or during a read.
Signed-off-by: Thomas Huth <address@hidden>
Signed-off-by: Jens Freimann <address@hidden>
Reviewed-by: David Hildenbrand <address@hidden>
Reviewed-by: Cornelia Huck <address@hidden>
Signed-off-by: Christian Borntraeger <address@hidden>
---
target-s390x/mmu_helper.c | 48 +++++++++++++++--------------------------------
1 file changed, 15 insertions(+), 33 deletions(-)
diff --git a/target-s390x/mmu_helper.c b/target-s390x/mmu_helper.c
index 67ad3cc..109a2d3 100644
--- a/target-s390x/mmu_helper.c
+++ b/target-s390x/mmu_helper.c
@@ -42,45 +42,26 @@
do { } while (0)
#endif
-static int trans_bits(CPUS390XState *env, uint64_t mode)
-{
- S390CPU *cpu = s390_env_get_cpu(env);
- int bits = 0;
-
- switch (mode) {
- case PSW_ASC_PRIMARY:
- bits = 1;
- break;
- case PSW_ASC_SECONDARY:
- bits = 2;
- break;
- case PSW_ASC_HOME:
- bits = 3;
- break;
- default:
- cpu_abort(CPU(cpu), "unknown asc mode\n");
- break;
- }
-
- return bits;
-}
+/* Fetch/store bits in the translation exception code: */
+#define FS_READ 0x800
+#define FS_WRITE 0x400
static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr,
- uint64_t mode, bool exc)
+ uint64_t asc, int rw, bool exc)
{
CPUState *cs = CPU(s390_env_get_cpu(env));
- int ilen = ILEN_LATER_INC;
- int bits = trans_bits(env, mode) | 4;
+ uint64_t tec;
- DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __func__, vaddr, bits);
+ tec = vaddr | (rw == 1 ? FS_WRITE : FS_READ) | 4 | asc >> 46;
+
+ DPRINTF("%s: trans_exc_code=%016" PRIx64 "\n", __func__, tec);
if (!exc) {
return;
}
- stq_phys(cs->as,
- env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits);
- trigger_pgm_exception(env, PGM_PROTECTION, ilen);
+ stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec);
+ trigger_pgm_exception(env, PGM_PROTECTION, ILEN_LATER_INC);
}
static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr,
@@ -88,7 +69,9 @@ static void trigger_page_fault(CPUS390XState *env,
target_ulong vaddr,
{
CPUState *cs = CPU(s390_env_get_cpu(env));
int ilen = ILEN_LATER;
- int bits = trans_bits(env, asc);
+ uint64_t tec;
+
+ tec = vaddr | (rw == 1 ? FS_WRITE : FS_READ) | asc >> 46;
DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __func__, vaddr, bits);
@@ -101,8 +84,7 @@ static void trigger_page_fault(CPUS390XState *env,
target_ulong vaddr,
ilen = 2;
}
- stq_phys(cs->as,
- env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits);
+ stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code), tec);
trigger_pgm_exception(env, type, ilen);
}
@@ -307,7 +289,7 @@ static int mmu_translate_asc(CPUS390XState *env,
target_ulong vaddr,
r = mmu_translate_region(env, vaddr, asc, asce, level, raddr, flags, rw,
exc);
if ((rw == 1) && !(*flags & PAGE_WRITE)) {
- trigger_prot_fault(env, vaddr, asc, exc);
+ trigger_prot_fault(env, vaddr, asc, rw, exc);
return -1;
}
--
1.9.3
- [Qemu-devel] [PULL 01/29] s390x/ipl: always load the bios for ccw machine, (continued)
- [Qemu-devel] [PULL 01/29] s390x/ipl: always load the bios for ccw machine, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 05/29] s390x/mmu: Move mmu_translate() and friends to separate file, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 03/29] s390x/ipl: drop reipl parameters on resets, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 28/29] s390x/pci: Rework memory access in zpci instruction, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 11/29] s390x/mmu: Fix exception types when checking the ASCEs, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 24/29] s390x/ioinst: Rework memory access in TSCH instruction, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 17/29] s390x/kvm: Add function for injecting pgm access exceptions, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 23/29] s390x/ioinst: Set condition code in ioinst_handle_tsch() handler, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 06/29] s390x/mmu: Fix the check for the real-space designation bit, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 22/29] s390x/ioinst: Rework memory access in STSCH instruction, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 10/29] s390x/mmu: Fix translation exception code in lowcore,
Christian Borntraeger <=
- [Qemu-devel] [PULL 26/29] s390x/ioinst: Rework memory access in CHSC instruction, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 07/29] s390x/mmu: Fix the handling of the table levels, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 15/29] s390x/mmu: Check bit 52 in page table entry, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 29/29] s390x/helper: Remove s390_cpu_physical_memory_map, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 20/29] s390x/ioinst: Rework memory access in MSCH instruction, Christian Borntraeger, 2015/02/18
- [Qemu-devel] [PULL 27/29] s390x/ioinst: Rework memory access in TPI instruction, Christian Borntraeger, 2015/02/18
- Re: [Qemu-devel] [PULL 00/29] s390x guest reipl and page table handling, Peter Maydell, 2015/02/26