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[Qemu-devel] [PULL v2 09/14] target-mips: fix detection of the end of th
From: |
Leon Alrae |
Subject: |
[Qemu-devel] [PULL v2 09/14] target-mips: fix detection of the end of the page during translation |
Date: |
Sat, 14 Feb 2015 17:44:59 +0000 |
The test is supposed to terminate TB if the end of the page is reached.
However, with current implementation it may never succeed for microMIPS or
mips16.
Reported-by: Richard Henderson <address@hidden>
Signed-off-by: Leon Alrae <address@hidden>
Reviewed-by: Maciej W. Rozycki <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
---
target-mips/translate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 881e7fb..a24863c 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19095,6 +19095,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu,
TranslationBlock *tb,
CPUMIPSState *env = &cpu->env;
DisasContext ctx;
target_ulong pc_start;
+ target_ulong next_page_start;
CPUBreakpoint *bp;
int j, lj = -1;
int num_insns;
@@ -19106,6 +19107,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu,
TranslationBlock *tb,
qemu_log("search pc %d\n", search_pc);
pc_start = tb->pc;
+ next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
ctx.pc = pc_start;
ctx.saved_pc = -1;
ctx.singlestep_enabled = cs->singlestep_enabled;
@@ -19204,8 +19206,9 @@ gen_intermediate_code_internal(MIPSCPU *cpu,
TranslationBlock *tb,
break;
}
- if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0)
+ if (ctx.pc >= next_page_start) {
break;
+ }
if (tcg_op_buf_full()) {
break;
--
2.1.0
- [Qemu-devel] [PULL v2 00/14] target-mips queue, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 02/14] jazz: do not explode QEMUMachineInitArgs structure, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 01/14] isa: add memory space parameter to isa_bus_new, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 09/14] target-mips: fix detection of the end of the page during translation,
Leon Alrae <=
- [Qemu-devel] [PULL v2 13/14] target-mips: pass 0 instead of -1 as rs in microMIPS LUI instruction, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 08/14] target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processors, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 06/14] gt64xxx: remove isa_mem_base usage, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 04/14] mips: remove isa_mem_base usage, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 03/14] jazz: remove usage of isa_mem_base, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 05/14] piix4: use PCI address space instead of system memory, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 11/14] target-mips: use CP0EnLo_XI instead of magic number, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 07/14] isa: remove isa_mem_base variable, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 14/14] linux-user: correct stat structure in MIPS N32, Leon Alrae, 2015/02/14
- [Qemu-devel] [PULL v2 10/14] target-mips: ll and lld cause AdEL exception for unaligned address, Leon Alrae, 2015/02/14